sorry I don't see why this is supposedly so clear, I admit that if the FB signal is less than 2.5V and the fet current hits the limit, then this needs the current limit off timer to run its full duration, as there may be a shorted output....however, if the FB pin is 2.5V or more, then it is perfectly acceptable , surely, for the off time to be curtailed by the FB pin falling below 2.5V, and for the FET to be switched on again.....surely this is the way to get a less noisy, and more beneficial operation?
It is perfectly natural , in most other current mode controllers, for the fet current to hit the sense peak, and then the fet be turned off.....it would not be natural to have the fet turning off for an inordinately long time in such occasions.