LM2326 PLL does not lock

[myicejade]

lmx2326 datasheet

Hi, I am troubleshooting a 2000MHz PLL design using National Semiconductor LM2326 2.8GHz PLL IC. My design parameter is:

My design parameters:

Fmax: 1970MHz
Fmin: 2030MHz
Loop BW: 3KHz
Fcomp: 50KHz
Fref: 12.8MHz
VCO: Vari-l Narrowband 5V VCO 1805-1880MHz
VCO Gain: 15MHz/V
VCO tuning Range: 0.5V-4.5V

I am using a 3nd order passive loop filter. The charge pump voltage Vp is at 5V, while the PLL Vcc1&Vcc2 is at 3.3V.

I have done some Frequency synthesizers with LMX2326,most of them is good ,but only few is bad ,the phenomena are as follows
first:the charge pump output voltage in R3 is 0V
second: the charge pump output voltage in R3is 5.0V(Vp=5.0V)
why????

I dont know how to resolve them , and I have checked my design circuits again and again,and I am sure that they are good,but the results is disappointed,how I do it ? please help me ? thank you very much!!!!
Warmest Regards

zhangjincai

 

[Japp]

lmx2326 wont lock

Fmax: 1970MHz
Fmin: 2030MHz
VCO: Vari-l Narrowband 5V VCO 1805-1880MHz

I guess you typed a wrong frequency range in the post? Or are you trying to use a vco ranging from 1805-1880MHz to reach a minimum frequency of 1970MHz?? If so I can understand why the tuning voltage is 5volt!.

Your problem could pretty well be answered in this (recent) thread;

 

[VSWR]

vco leakage causing pll not able to lock

It seems you've picked the wrong VCO:

**broken link removed**

This VCO oscillates at 1880 MHz at a tuning voltage of 4 V. Instead, select a VCO that is adapted for your need 1970 to 2030 MHz, e g this one:

**broken link removed**

(Vari-L is now Sirenza Microdevices)

 

[myicejade]

pll wont lock

I am wrong

In fact ,VCO frequency range is 1970MHz~2030MHz, I wrote it wrongly

 

[myicejade]

lmx2326

In fact, My design parameters:

Fmax: 1970MHz
Fmin: 2030MHz
Loop BW: 3KHz
Fcomp: 50KHz
Fref: 12.8MHz
VCO:1970--2030MHz
VCO Gain: 15MHz/V
VCO tuning Range: 0.5V-4.5V

I wrote it wrongly

 

[myicejade]

pll doesnt lock on 16mhz

After I have replaced new PLLs (LMX2326), some Frequency synthesizers is ok! but others is still bad.
the output voltage of charge pump of PLL is 0V or +5V

 

[myicejade]

varil vco 190 2225t

I have checked the loop filter and LMX2326's pins carefully, and I am sure that there are not open circuit and short circuit .

I am sure the VCO is good!

 

[pva]

lmx2326 loop bandwidth

look what is the VCO frequency when charge pump of PLL is 0V and +5V,when the charge pump is 0V the VCO must reach lower frequency(in most case) if this occur this meen that you may have some software problems.

 

[webdog]

lmx2326 phase detector problem

After I have replaced new PLLs (LMX2326), some Frequency synthesizers is ok! but others is still bad.
the output voltage of charge pump of PLL is 0V or +5V

If I understand you correctly, you have made several of these PLL, some work and other does not. I.e. you are dead sure your IC is programmed correctly :?:

Looking at your design, you have a single loop with a divisor of 40 000 which means very high loop gain! I would really look long and hard for any noise that would cause the phase detector to loose lock! Doubble check the values of your passive components in the loop filter, it is far to easy to pick the wrong value by mistake. With smd it is hard to spot this error. What about the capacitor in your filter, maybe leakage is too big, try to redesing with a smaller capacitor. Or you may have too big resisitor in the filter, thermic noise can really make things bad....

It would help us if you did post your loop filter values! I did a quick simulation and did spot some potential problems.... c1 needs to be very low value! Finally your oscillator should really be able to tune above and below your frequency limits due to component and temperature variances

Keep us posted on your progress
/WebDog

 

[myicejade]

lm2326

thank you for your advices

loop filter : C1=3600PF, C2=22nF,C3=470pF ,R1=15K,R2=91K
loop bandwidth:2KHz

these values was abtained from EasyPLL(National Semiconductor)


this question is resolved!!!!!

In my circuits ,According the recommonding circuits of LMX2326, I parallelled a 50Ω resistor to GND in output of TCXO for LMX2326 providing reference signal.

When I removed this 50Ω resistor from my circuits ,the question was resolved

why? I dont know the answer!

appendix is National Semiconductor recommending circuits about LMX2326

 

[myicejade]

rf vco varil sirenza

appendix is National Semiconductor recommending circuits about LMX2326

 

[myicejade]

varil plls

 

[myicejade]

low temperature pll lock problem

National Semiconductor recommending circuits about LMX2326

 

[myicejade]

how does a pll circuit working

please help me !!!

How I can post circuit diagram (BMP)on edaboard!!!

 

[H_u_n_t_e_r]

pll does not lock

did you take a look to national forum...
tpic name:
LM2326 PLL does not lock

hxxp://wwwd.national.com/national/wirelessMB.nsf/0/cc5870f0be96d8ef88256f0c000f3b4c?OpenDocument

 

[STOYANOV]

lmx2326 problem

Hi,

50 Ohm resistors are included in test circuits of allmost all PLL's datasheets.
In this way the PLL input is "matched" to the test generator.
This resistor is not needed for normal PLL use. You must match your reference
generator and VCO to the relevant PLL input. Or, at least, to assure normal,
i.e within specified limits, RF voltages. It is a good practice to drive the PLL
reference input with a voltage near to the specified maximum.

I hope, above will help.

BR,

STO

 

[webdog]

pll not locking

myicejade,
my guess is that with the 50 ohm resistor you load the tcxo badly, and then have low driving input at your PLL, and this makes it jitter. Normal TTL/CMOS circuits are really supposed to operate with higher load impedance.
If you want to have low impedance driving you need to buffer the tcxo first.

Glad you have your circuit working!

Cheers
/WD

 

[myicejade]

lm 2326

thank you very much!!!!

I have learned a lot from your advices, thank you once more!!!

I Love EDAboard