satya_kola
Newbie level 4
![Newbie level 4](/styles/images/ranks/blevel1.gif)
- Joined
- Aug 19, 2012
- Messages
- 5
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- 1,281
- Location
- Hyderabad, India
- Activity points
- 1,362
Hi
I am new to FPGA world. I am using a Xilinx ML 402 Board for my experiment. I writen a code to glow the LED for 1sec and off for 0.5 sec.
But the LED is always OFF.
this is my code.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use work.one.all;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity pulse_gen is
Port ( SYSCLK : in STD_LOGIC;
pulse_out : out STD_LOGIC;
count : out integer);
end pulse_gen;
architecture Behavioral of pulse_gen is
begin
process(SYSCLK)
variable c : integer:=0;
begin
if ( SYSCLK = '1') then
if c <= 2000000000 then
if c <= 1000000000 then
pulse_out <='1';
else pulse_out <= '0';
end if;
else c := 0;
end if;
end if;
c := c + 1;
count <= c;
end process;
end Behavioral;
My ucf is
NET SYSCLK LOC = AE14;
NET pulse_out LOC = E7;
I am new to FPGA world. I am using a Xilinx ML 402 Board for my experiment. I writen a code to glow the LED for 1sec and off for 0.5 sec.
But the LED is always OFF.
this is my code.
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
use work.one.all;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity pulse_gen is
Port ( SYSCLK : in STD_LOGIC;
pulse_out : out STD_LOGIC;
count : out integer);
end pulse_gen;
architecture Behavioral of pulse_gen is
begin
process(SYSCLK)
variable c : integer:=0;
begin
if ( SYSCLK = '1') then
if c <= 2000000000 then
if c <= 1000000000 then
pulse_out <='1';
else pulse_out <= '0';
end if;
else c := 0;
end if;
end if;
c := c + 1;
count <= c;
end process;
end Behavioral;
My ucf is
NET SYSCLK LOC = AE14;
NET pulse_out LOC = E7;