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LEADING Power Factor Correction Problem

oh_well1500

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QUESTION,
I can get into specifics later, but on a conceptual level, I have 277 V 60 Hz from a three phase source powering a low pass filter that has enough capacitance that dozens of them at the same facility are causing a LEADING power factor and the utility company is demanding a fix. Could I fix this simply by introducing a shunted inductor with the right amount of inductance to lower the apparent power to more acceptable levels?

20240730144530123-1.png
 
If you knew how much you were off by, couldn't you go
swapping capacitor values to lower ones with same
(or better) reliability & code-compliance? Probably screw
terminals at that size, simple enough?
 
From what I understand you can achieve an extent of pf correction. The LC tank acts as a bandstop network. Select the inductive Henry value so it creates resonance (at 60 Hz) with the capacitive load. This solution works the same way as in the conventional case of an inductive load (motor, etc.) The result is a bandstop filter in either case.

Simulation below shows raw capacitive load causes Ampere waveform out of alignment with Voltage waveform. Parallel inductor pulls Ampere waveform back to coincide with Voltage waveform.
The lissajous scope figures at bottom make this clear. The left-hand shows extreme phase difference. The right-hand shows phase alignment.

PF error caused by 550 uF load (corrected by 13 mH inductor).png
 
If proposing a parallel inductor - you want the res freq to be off the mains freq - else resonance - which means you also want damping resistors on the parallel L for the same reason - tuning the R to give the required current - this is not a trivial task.
 
From what I understand you can achieve an extent of pf correction. The LC tank acts as a bandstop network. Select the inductive Henry value so it creates resonance (at 60 Hz) with the capacitive load. This solution works the same way as in the conventional case of an inductive load (motor, etc.) The result is a bandstop filter in either case.

Simulation below shows raw capacitive load causes Ampere waveform out of alignment with Voltage waveform. Parallel inductor pulls Ampere waveform back to coincide with Voltage waveform.
The lissajous scope figures at bottom make this clear. The left-hand shows extreme phase difference. The right-hand shows phase alignment.

View attachment 192764
Brad,
Thank you for your incredibly thorough explanation, it reassures me that my grasp of the concept isn't as far off as I feared. Not only do I agree with your calculations, but I also actually ordered a 13 (12.8) mH inductor and installed it in my circuit, the total current was 20 amps and since I had taps on the inductor I was able to observe the total current rise if I increased or decreased the inductance by 1 mH. This is where my confusion lies, is a total current lower than 20 amps (your simulated 24.4) possible? The intention was to try to have around 6 amps total current as 60 amps is present without the correction and no load, this is the current draw we are trying to greatly reduce.
 
I don't see a resonance problem, LC resonator is shorted by grid impedance.
Not seeing a problem is some way from there not being a problem, if you had worked in installing similar PFC - you would know there are issues.
 
Not seeing a problem is some way from there not being a problem, if you had worked in installing similar PFC - you would know there are issues.
Well said Easy Peasy ha ha, if you have experience, any insight into my latest response? I would appreciate it, this is my first go at power factor correction, like most things it is not as easy in practice.
 
Brad,
Thank you for your incredibly thorough explanation, it reassures me that my grasp of the concept isn't as far off as I feared. Not only do I agree with your calculations, but I also actually ordered a 13 (12.8) mH inductor and installed it in my circuit, the total current was 20 amps and since I had taps on the inductor I was able to observe the total current rise if I increased or decreased the inductance by 1 mH. This is where my confusion lies, is a total current lower than 20 amps (your simulated 24.4) possible? The intention was to try to have around 6 amps total current as 60 amps is present without the correction and no load, this is the current draw we are trying to greatly reduce.
Capacitive impedance is governed by the formula:

XC= 1 / (2 π f C)

Hence lesser Farad value makes for reduced Ampere draw.

You can do tests in Falstad's simulator. Click the weblink below to:

1) Navigate to Falstad.com/circuit,
2) Load my schematic into the animated interactive simulator,
3) Run it on your computer.

tinyurl.com/247djpr5

Change component values by right-clicking and selecting "Edit".
Select Toggle Full Screen (under File menu).
Drag upward on top border of scope region to enlarge it.
 
Thank you Brad,

Coincidentally I was looking for an alternative to Pspice for quick simulations and that tool will be very helpful.

I think I am missing something fundamental, the high capacitance does cause the high current draw, I agree. I thought the shunt inductor, creating a tank circuit, could reduce the total current to something lower than 20 amps as the reactive impedances would be equal and opposite, so my confusion is why it still reads 20 amps. 60 amps across the capacitor, 60 amps across the inductor, but 20 amps on the input and ground, total current.
 
We cannot see the exact inside of the " filter " nor the details of the load - all these things make a difference,

if you work out the vector sum of XL and Xc and divide this into the supply voltage - this should be your 20 A impedance

balancing XL & Xc is not as easy as first glance may suggest - esp if the mans freq is a bit variable
 
Hi,
I thought the shunt inductor, creating a tank circuit, could reduce the total current to something lower than 20 amps
Example:
let´s say you draw real power of 1000W on 230V (do we know your exact values?), then the theoretical current minimum would be 1000W/230V = 4.348A.

1) now if you go for a power factor of 0.98, then the expectable current (theoretically) would be 4.437A.

***
2) But ... the inductance you installed gets warm, too , since there will be a lot of current through it. This "getting warm" also is some real power.
So maybe the inductance dissipates 50W, then your total real power is 1000W + 50W = 1050W now. (btw: you have to pay for this additional 50W)
With 1050W you get a theoretical minimum of 4.565A ... and 4.658A on PF = 0.98.

This all is true for pure sine shaped currents.
3) But in reality you may have some distortions. These distortions create overtones. Overtones are integer multiples of mains frequency:
In case of 50Hz mains frequency, the overtones are: 100Hz, 150Hz, 200Hz, 250Hz ... and so on in frequency. The amperage is unknown (to us).
The currents of the individual overtones add (by using squares and squareroot) to the fundamental (50Hz) current.

4) Due to the reduced overall current .. there will be less voltage drop on the grid lines. Thus the voltage at your load will be slightly higher.
Depending on the type of your load .. this increased voltage may also cause increased active power. and thus increased load current (with respect to the lower voltage)

... there may be even more effects that increase the current.

Klaus
 
I didn't yet hear substantial considerations why a parallel PFC inductor needs extra damping due to resonance effect.
A possible problem is however brought up if you disconnect the inductor or even worse the unloaded local network with inductor from grid. Kick-back voltage can damage equipment or flash over power switch.
Overvoltage clamping can handle the problem better than damping resistors.
--- Updated ---

The post #1 sketch involves 15.9 kVAr reactive power, that's a really big inductor. Assuming three phase design it's about 100 kg, single phase even more. You might think about an electronic compensator.
 
Last edited:
I didn't yet hear substantial considerations why a parallel PFC inductor needs extra damping due to resonance effect.
- that's because the reasons have not been given here - but just to assist you - imagine the L & C have very low R and sit at a resonance freq of 60Hz - what will be the current in each ? - what will be the external current to the parallel pair ?
--- Updated ---

Oh yes - if you have grid signalling in your area - or noticeable harmonics - the cap currents can get very large indeed and cook the caps and trip breakers.
 
The thread isn't about cap current. 550 uF filter caps are already there and the reason why the OP is looking for compensation, review post #1. I didn't say the caps won't possibly cause problems, I stated there's no particularly resonance problem when adding a parallel PFC inductor.
 
The thread isn't about cap current. 550 uF filter caps are already there and the reason why the OP is looking for compensation, review post #1. I didn't say the caps won't possibly cause problems, I stated there's no particularly resonance problem when adding a parallel PFC inductor.
What is confusing me FvM, is I built the circuit, with a 12.8 mH inductor, in parallel with a capacitor bank of 550 uF, and I am measuring 60 amps on the cap bank line, 60 amps on the inductor line, and 20 amps on the input current before the node.
 
my confusion is why it still reads 20 amps. 60 amps across the capacitor, 60 amps across the inductor, but 20 amps on the input and ground, total current.
That's the inexplicable thing about power factor. I had to dig into detailed articles before getting any grasp of its nature. It's not that the power company's generators need to work any harder or burn an abnormal amount of coal. However they need to (or would need to) install thicker wiring everywhere in order to carry the extra Amperes.

Your reactive component (inductor or motor or capacitor) tries to draw Amperes at an odd time in the voltage cycle. But it also sends power at the other terminal. So the power company is less concerned about your equipment affecting power factor in that regard.

However they want you to install a second reactive component so that the waveforms coincide... and so that every particle of power dissipation occurs only on your property. There are further details (stated by Klaus in post #14). And 3-phase adds its own kind of complications.
 
Hi,
What is confusing me FvM, is I built the circuit, with a 12.8 mH inductor, in parallel with a capacitor bank of 550 uF, and I am measuring 60 amps on the cap bank line, 60 amps on the inductor line, and 20 amps on the input current before the node.
do you understand how vector arithmetics or vector drawing works?

Klaus
 

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