LDPC Encoder implementation using VHDL

Hi...
I implementing LDPC encoder for DVB-T2 as per the DVB-T2 standards....
Plz help me....

specification r as per standard....

WHat do you need help with?

in that calculation of address of the array and xoring the calculated address location signal to Input data and again it assign to the that location only........ like this i need to calculate around 8 process in one clock cycle only....
i not getting how to do this..... i have tryied but it is not assigning the all 8 value to respected address ... only one value is assigning...

post the code, lets see the problem...

LDPC is implemented as per the standard:

The LDPC encoder treats the output of the outer encoding, I = ( i0 , i1,...,iKldpc −1) as an information block of size Kldpc Nbch , and systematically encodes it onto a codeword Λ of size Nldpc , where:


The task of the encoder is to determine Nldpc − Kldpc parity bits ( p0 , p1,..., pnldpc −kldpc −1) for every block of Kldpc information bits, ( i0 , i1,...,ikldpc −1) The procedure is as follows:

• Initialize p0 = p1 = p2 = ... = pNldpc −Kldpc −1 = 0

• Accumulate the first information bit, i0 , at parity bit addresses specified in the first row of tables A.1 through A.6. For example, for rate 2/3 ,

p317 = p317 xor i0 p6700 = p6700 xor i0
p2255 = p2255 xor i0 p9101= p9101 xor i0
p2324 = p2324 xor i0 p10057 = p10057 xor i0
p2723 = p2723 xor i0 p12739= p12739 xor i0
p3538 = p3538 xor i0 p17407 = p17407 xor i0
p3576 = p3576 xor i0 p21039 = p21039 xor i0
p6194 = p6194 xor i0


• For the next 359 information bits, im, m =1, 2, ..., 359 accumulate im at parity bit addresses
{x *mmod360*Qldpc}mod(Nldpc -Kldpc ) where x denotes the address of the parity bit accumulator corresponding to the first biti i0 , and Qldpc is a code rate dependent constant specified in table 8(a). Continuing with the example, Qldpc 60 for rate 2/3. So for example for information bit i1, the following operations are performed:

p377 =p377 xori1 p6760=p6760 xor i1

p2315 =p2315 xor i1 p9161=p9161 xor i1

p2384=p2384 xor i1 p10117 =p10117 xor i1

p2783=p2783 xor i1 p12799 =p12799 xor i1

p3598 =p3598 xor i1 p17467 =p17467 xor i1

p3636=p3636 xor i1 p21099=p21099 xor i1

p6254 =p6254 xor i1

• For the 361st information bit i360 , the addresses of the parity bit accumulators are given in the second row of the tables A.1 through A.6. In a similar manner the addresses of the parity bit accumulators for the following 359 information bits im, m = 361, 362, ..., 719 are obtained using the formula {x + (mmod360)×Qldpc}mod(Nldpc − Kldpc ) where x denotes the address of the parity bit accumulator corresponding to the information bit i360 , i.e. the entries in the second row of the tables A.1 through A.6.

• In a similar manner, for every group of 360 new information bits, a new row from tables A.1 through A.6 are used to find the addresses of the parity bit accumulators.

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this given in as per standard so need to implement this...

This is just the standard, but you havent posted the problem.