LDO design without on-chip capacitor

Hey,

I need to design a capless LDO with a dropout voltage of 0.8V and load currents from 0 to 60mA.

Up to now my first joice would be the Milliken LDO with a current differentiator for compensation.
No I read that this design is very critical due to missmatch.
Could anyone confirm that?

Is there any other design that you coud recommend?

0.8mV drop with 60mA implies an Ron resistance of 13 mOhm.
Since this power loss is only 48 uW, it is hardly the spec you would find for an LDO.

It is important to realize that LDO's are rated at high current and Vdrop so your choice will probably be rated for a MUCH higher power level in order to use a 13mOhm Ron MOSFET to regulate an ultra low drop.

13 mOhm is a very small spec for this low current! Perhaps even unreasonable spec.

Click to expand...

For example if I use a website filter for selecting an LDO based on 60~100mA I may not find a good choice of Vdrop. But If you widen the search to ten AMPS (10A), there is a better chance of matching the computed effective Ron from Vdrop @Imax .. For example 0.05V drop @ 2A is not low enough ( 25 mOhm)

I checked all of DigiKeys LDO's and not one has an Ron less than 25mOhm.

So you have 3 choices.
1) increase Vdrop spec
2) Roll your own LDO with a big HEXFET Ron=13mOhm
3) keep looking

I´m sorry,
I did a really stupid typing error.

It should be 0.8V instead of 0.8mV...
This makes the situation really different!

hahaha no problem

https://www.digikey.com/product-sea...cs/pmic-voltage-regulators-linear-ldo/2556290
use Ctrl+ click or to select item in search menu or shift + click to select range in each column then GO.

then sort by price, descending (in stock) for qty.

Do you have any topology in mind?
I checked several components but there wasn´t any schematic shown inside the datasheet.
I want to design the LDO in a 0.35nm cmos technology.

I doubt if the compensation network of Milliken is so very sensitive to mismatch (-->stability). Can you point to the link where they discuss about this issue? . You can also have a look at some of Philip Mok's paper's, but at least the compensation concepts are very similar.

Hey,

the matching problem was discussed here in edaboard but meanwile I found Millikan´s thesis were the missmatch problem was discussed with more detail.
I´m quite sure that stabillity does not have to be affected with a proper design.

Thanks for the hint on Monk´s approach.

I´m still fighting with the right positioning of the poles and zeros inside my design but it seams to work out for me.

Implementation is a well guarded secret and so are how they manage Phase margin and Stability.

You won't find schematics except on legacy >30 yr old designs such as the LM317.

So start with block diagrams.


and https://www.ece.ust.hk/~eemok/ but also give credit to patent rights.

Yes, I output level is sensitive, but generally the accuracy of the LDO is not of great concern. But still do you have any issues related to stability?

Why don't you use miller compensation?

I guess miller compensation will have a lot of PT gain dependence. And also for the capless LDO design, it is quite important to have a fastest loop, which will be good if it is a part of the main compensation itself --> which hardly is provided by simple miller.

as far as i know the milliken approach is implemneting pole splitting within the fast loop.