LC oscillators, basic queston

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palmeiras

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Hello guys,

Could you please, help me with the following basic question about RLC? (Book Razavi pag. 488).

(a) It is said that for very small frequencies near zero, the voltage gain is very small. Only to confirm: is it true because the impedance of this parallel of LP/Rp/CP at frequencies near zero, is very small?

(b) Razavi says: "The inductor cannot sustain a large dc drop. In other others words, if the average value of vout deviates significantly from VDD, then the inductor series resistance must carry an average current greater then I1”.
Why the current should be greater than I1?



Thank you very much,
 

Dear palmeiras
Hi
About your first question , yes you're right .
and about your 2nd question :
The inductor at DC , after five time constant , will be short circuit . and it will be saturated . so i think his mean was something like this.
Best Wishes
Goldsmith
 
Thanks Goldsmisth for your reply.
Lets considering the inductor resistance (RL)…. And therefore, vout is less than VDD.
But, the current flowing across RL must be less than I1. In fact, the current I1 (M1) must be equal to the currents in the inductor resistance + resistor Rp.
So, why does Razavi say about current greater than I1?
Thank you,
 

Re question (a):

Yes, voltage gain is low at low frequencies because impedance is low. The inductor readily passes current. Hence there is little voltage drop across it at low frequencies.

Re question (b):

The elevated inductor current is only momentary. It quickly declines to a lower level again as soon as the former voltage swing is regained.
 
Again Hi
I'm agree with Bradtherad .
And if you want summing between those currents , after transient time , you can do it simply . but if you want consider the AC components of current , you can't sum them simply . it will be complex . and you should try to solve it as an RLC circuit .
Best Regards
Goldsmith
 
Hello Guys,

Thanks for all replies.... But I didnt undertand yet what Razavi meant. Could you explain in different way?
 

Again Hi
Ok , i want describe , all things about that circuit :
At first step , that circuit called , tuned amplifier , that can be used , as an amplifier of oscillator , or simple pri amp for RF systems.
Well what's the specification of that circuit ?
Well ! it is pretty nonlinear . because without biasing network , it will work at class B . and class B amp , will follow , nonlinearity , equations .
So what is the advantage of that RLC network ! I'll say ! each RCL network , has a Q factor and resonant frequency . usually , the Q factor of RLC network , can be very high .
And the mosfets current will be complex . why ? it is simple , the current through , resistor , is ohmic , ( without phase shift ) , buth the current through , the L and C are imaginary .
So at the resonant frequency , if you suppose , that there isn't any resistor at collector or drain , we will have infinite impedance instead of AC signal that it's frequency is about the resonant frequency (Apptox) . so , with adding a resistor , we will try to decrease the bandwidth , remember that the BW , at parallel RLC networks , given by , 1/2*pi*R*C . but it isn't all ! you can solve that circuit as a simple RLC circuit , you'll see what will happen on currents! but you should solve it for 2 time , a first time instead of DC signal , and in 2nd time , instead of AC signal , and then , super position , method !( summation between AC components and DC components ).
I hope this can help you .
Best Regards
Goldsmith
 

    V

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Hi palmeiras,

I suppose, your main question is: Why the ouput voltage exceeds Vdd (as summarized by Razavi below the diagram) ?

For explanation of this phenomenon you simply can treat the circuit (as a first step) as a grounded RLC tank with damping that is energized repeatedly by short pulses.
As a consequence, the injected energy will swing between L and C and, thus, cause a sinusoidal wave.
The only difference to the circuit under discussion is that the tank circuit is not grounded but has a qiescent voltage of Vdd (due to the off condition of the transistor without any input signal). Now, if there is a sinusoidal wave at the gate, the transistor works as a current source in class-B operation and injects a certain part of a half-wave sinus into the tank circuit. And the effect is the same as described above: The losses of the damped tank circuit are compensated by periodic current "pulses" - and there is a sinusoidal signal around the quiescent potential, which in this case is Vdd. Therefore, the peak amplitude must exceed the Vdd value.
 

    V

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Hello LvW, BardtheRad and goldsmith,

Thank you very much for all replies! Great answers.
I was trying to understand what Razavi mean with "if the average value of Vout deviates significaly from VDD, then the inductor series resistance must carry an average current greater then I1."
 

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