[SOLVED] LC Filter for H-bridge

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emaniac

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Hi,

I'm designing an H-Bridge Inverter using IR2110.

Now testing the H bridge with 20Watt Load. Vmos = 12V. F = 16KHz
Filter: L = 2mH, C = 0.8uF

The Negative Half Cycle ripples are not removed completely.

Here is the scope output



I could guess it is because of Poor Filter design.

I have 320V DC output from Push-Pull stage. But not integrated with H bridge now.

Please help me design a better LC filter.

Regards
 

The filter inductor should be selected with a fundamental wave reactance of 1 to 4 % of the characteristic inverter impedance Vrated/Irated .
 

It appears that something happens different in the negative cycle, compared to the positive.

Do you cause the inductor to see high impedance at any time during the negative cycle?
Or does current continue through the inductor at all times?
 
Hi BawA,

Thank you for your help.
Here is my calculation result considering the characteristic Impedance

1% of X = 2*pi*f*L (f = 50Hz)

L = 230uH; C = 0.43uH

And this didn't work. I got a result as if there is no Filtering at all.

I did consider this calculation results before and it didn't work. That's when I used 2mH, the ripples was almost removed. I don't know if this is misleading me to a false conclusion.

Hi BradtheRad,
Do you cause the inductor to see high impedance at any time during the negative cycle?
Click to expand...

I'm sorry. I don't really know what you meant by this. But I could sense you are someway right. Can you Please explain me in simple terms.

Regards
 

can you provide me the following parameters
1) SPWM is bipolar or unipolar ?
2) power rating of inverter?
 

Hi,

Here is the gate Signals,
High side Mosfets Gate Signal
**broken link removed**

Low side Mosfets Gate Signal
**broken link removed**

Inverter is supposed to be 400w.
Now I haven't integrated the push-pull part. Using the H Bridge with 20Watt Load

Vrated = 12V
Irated = 1.66

Here is the output with L = 230uH; C = 0.43uH. Couldn't upload the image before.


Regards
 

Hi
Gate Signals attachment didn't work, adding here
High Side Gates



Low Side Gates


Regards
 

emaniac said:
Hi BradtheRad,

I'm sorry. I don't really know what you meant by this. But I could sense you are someway right. Can you Please explain me in simple terms.
Click to expand...

I was referring to an inductor generating high-voltage spikes when shut off abruptly.

This simulation portrays how it behaves. The lefthand inductor can conduct at all times. It is sufficient to smooth the waveform if you use the simple LC second order filter.

The righthand inductor sees sudden high impedance, causing it to generate HV spikes. It needs a more effective snubbing network.



Of course I cannot be certain this is the cause of your problem.
 
Hi BradtheRad,

Thanks a lot for the simulation. I can now clearly understand that.

If snubbing is an issue, then it should very well happen in the positive cycle also right (I don't know if I'm right)? I have also added my gate signals in post #8.

I changed the capacitor value and the sine was Pure, But Positive Half Cycle is 8.4V and negative Half Cycle is 4.4V. Also the High side Mosfet (which is not connected to Inductor) is getting Hot.

Filtered Otuput


H bridge legs before filtering


Regards
 

Hi BradtheRad,

to see high impedance at any time during the negative cycle?
Click to expand...

Food for thought. Thank you.

Fixed it!
I was using SMPS as power supply for Vmos - 12V, Oscilloscope and SMPS ground was the same. Running on a battery, It works fine.
Thank you all.
Regards
 

Hello can you tell me the exact value of LC filter for H-Bridge output frequency vary from 0-50 hz.

- - - Updated - - -

Vdc bus is 330vdc and output from 230v line to neutral
 

Choose L and C values which each yield a reactive impedance of approximately the same impedance as your load, for a frequency in the middle range between your fundamental and your carrier.

Here is an experiment with a simulation for your specified values.
50 Hz fundamental, 20 kHz carrier, 330 VDC supply, 1kW output.



By adjusting L and C values, and watching the waveforms, it appears suitable values are 2 mH and 1 uF.

If you find the output voltage is high, increase L to reduce it (and vice-versa).

Increasing the capacitor value increases amplitude. It also plays a role in correcting power factor (especially if a transformer is involved). It is crucial that current and voltage waveforms coincide as they are drawn from the supply.

You should also watch for unwanted resonant action.
 

abc_de said:
hello BradtheRad
thank you for your simulation result. 1uf capacitor is electrolytic would be electrolytic or non electrolytic
?
Click to expand...

Since it is exposed to AC, the capacitor has to be non-polarized.

Electrolytics are polarized, however a handy trick is to connect two electrolytics back-to-back. This permits them to pass AC without being ruined.

Check this Edaboard discussion:

https://www.edaboard.com/threads/56473/
 
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