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Layout Check for FLyback Power SUpply

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sabu31

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Dear All,

I have made a flyback PCB with output of 20V, 3A. AC input 230V. Please could you check my schematic and layout and let me know what could be improved.

Thanks
 

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  • layout.pdf
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  • schematic.pdf
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I'm running a simulation to focus on your D-C-R snubbing network. It must absorb spikes at 330V, neighborhood of 8-13 A.

Values are 330nF and 5 Kohms. I show your capacitor acquiring upwards of 1000 V after just a few cycles. Discharge is slight due to resistors R1 R2 at several thousand ohms.

Although my knowledge isn't expert I recommend reducing those resistors to a few hundred ohms.
 

Thanks BradtheRad For the reply.
There is a mistake in snubber in snubber. I used default resistor/capacitor values.

The value I am intending to use is 10nF and 30K.
The leakage inductance I am assuming is 4micro henry and switching frequency is at 100Khz.

The typical value of snubber resistor I am seeing in app notes is from 20k to 50k
 
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Hi,

Safety first:
There is not sufficient clearance and creepage distance to fulfill safety standards. Don't hurt/ kill yourself or others.
I even suspect there is not sufficient functional isolation clearance at the high voltage side.

Then there are no GND planes. Expect increased ringing and thus increased EMI radiation.

This does not meant that it does not work.
But even if there is the correct output voltage .. this does not mean it is safe ... or legal.

There were similar discussions before...with detailed discussions. Just fo a forum search.

Klaus

Added:
I doubt the output voltage feedback can work. I see just one trace from the output capacitors to the optocoupler circuit.
This way I'd say there is a good chance for overvoltage at the output ... the output capacitor may get overcharged, explode and catch fire.

My recommendation: Don't try to build this circuit now. Please start with less dangerous designs, first learn about safety standards and PCB design.
 
Last edited:

    sabu31

    Points: 2
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Hi,

Safety first:
There is not sufficient clearance and creepage distance to fulfill safety standards. Don't hurt/ kill yourself or others.
I even suspect there is not sufficient functional isolation clearance at the high voltage side.

Then there are no GND planes. Expect increased ringing and thus increased EMI radiation.

This does not meant that it does not work.
But even if there is the correct output voltage .. this does not mean it is safe ... or legal.

There were similar discussions before...with detailed discussions. Just fo a forum search.

Klaus

Added:
I doubt the output voltage feedback can work. I see just one trace from the output capacitors to the optocoupler circuit.
This way I'd say there is a good chance for overvoltage at the output ... the output capacitor may get overcharged, explode and catch fire.

My recommendation: Don't try to build this circuit now. Please start with less dangerous designs, first learn about safety standards and PCB design.
Thankyou KlauST for your reply. I will make corrections in the layout and schematic. Is the arrangement of the components fine? I will increase the spacing in the high voltage side. Thanks
 

Dear All,

I have updated the schematic and PCB layout. In earlier schematic a output ground connection to opto circuit was missing.
Is the layout fine with respect to safety and functionality.

The other aspect is whether there is any particular rule for orientation of components (horizontal /vertical) or we can do depeding upon which takes minimum trace width.
 

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  • schematic.pdf
    104 KB · Views: 164
  • layout.pdf
    34.6 KB · Views: 157

Hello sabu31,

I am here to make few comments about the PCB, first, try to minimize the length of the HV traces and widen them up, this can be done by rotating the rectifier circuit and bringing it closer to the input. Second, you can always have the GND plane as a copper pour over the bottom side, this should stabilize the design. and last, always keep enough isolation distance between HV and LV there are calculators for that and also make sure it corresponds to the manufacturing accuracy (in case you are using drilling for manufacturing) also care for the surface insulation, last two are not to worry about if you send that to a PCB factory.

Regards and good luck!
 

You likely did not took into account Klaus remarks regarding to safe clarance. I also would be concerned in some dimensions, such as the diameter of the U1 pads which could spread out over the solder each other, as well as the hole diameter of transformer pads that seems undersized.
 

You likely did not took into account Klaus remarks regarding to safe clarance. I also would be concerned in some dimensions, such as the diameter of the U1 pads which could spread out over the solder each other, as well as the hole diameter of transformer pads that seems undersized.
HI Andre_teprom,
Thanks for the reply.
I made corrections as per Klaus comments regarding clearance (according to my understanding) , i had kept design rules for 2.5mm spacing between power components. And 1 mm for signal level components. I had redrawn the layout as you may compare between the 1st post and my last post.

However, if i have still not done clearance properly, please could you highlight specifically regarding clearance (which components/trace) or ( mark in the pdf). It would be of great support. The transformer pads(holes) are somehow coming small when printing to pdf. I am attaching the screen shot which shows the hole correctly.
 

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  • Screenshot 2020-06-17 17.37.54.png
    Screenshot 2020-06-17 17.37.54.png
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Note that one thing is the clearance betwewen nets that are just traces which has some insulating finishing, but whenever the primitive is a pad at which solder can accidentlly spread out, I add an extra clearance, and you have more than sufficient space available.
 

you do not have 8mm between primary and secondary conductors

You have no fuse
You have no MOV
You have no Common mode choke
You have no Y cap across the transformer
You have no inrush limitation...your pri bus cap (100uF) will get worn out by inrush if often switched on/off

Attahced is general layout guide
 

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  • Basics of SMPS Layout _4.zip
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    sabu31

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Thank you Treez for the reply. The PDF attachment was really helpful.

I have not included choke and inrush current limiter. But will include in final design. I have modified the PCB layout. Is there any other improvement which could be done . Thanks
 

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  • PCB.pdf
    40.7 KB · Views: 140

Hi,

The clearance at the D6 cathode is way too low.
Usually there must not be any copper underneath the optocoupler. The clearance should be as wide as possible.

I didn't check all of the design.

Klaus
 

    sabu31

    Points: 2
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Hi,

The clearance at the D6 cathode is way too low.
Usually there must not be any copper underneath the optocoupler. The clearance should be as wide as possible.

I didn't check all of the design.

Klaus
Thanks KlauST for the reply.
 

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