Hi,
When the synthesis tool cannot determine 'not define condition', it will keep the previous value.
Plus, inside ur case statement you didnt define "default:"
Thus, it will infer a latch.
example
always @(sel) // Level sensitive
begin
case (sel)
2'b00: out = I0;
2'b10: out = I1;
endcase // Here u dont define "default" value
end
In this case, what is the output value if
sel = 2'b00 --> out = I0;
Now, what is out if sel is set to 2'b11.
In simulation result, it will keep or HOLD previous value which is out = I0.
To synthesis tool, this is a latch.
Unless, u define "default: out = I1;"
Now, other than 2'b00 and 2'b10, out is by default equal to I1.
Hope my explanation is clear to u.
If u still have any doubts, pls let me know.