Large Voltage Spike in Forward Converter at No LOAD!!

Hi for all
First of all sorry for my English

I have very big problem in forward converter! My Voltage Spike in NO LOAD is very high and i can't control this voltage with RCD clamp! I used Voltage clamp and "Rate of Rise" snubber to decrease this spike but resister of RCD network is very hot! Before create this topic i search in forum and found some solution to solve this problem but unfortunately I did not succeed!

View attachment DS0003.BMP

To solve the problem, i do the following
1. increase gate resistor (Conditions were better)
2. add 2N3906 on gate to discharge gate capacitor vary rapidly (Conditions were better)
3. re-design transformer (Conditions were better)
4. use tertiary winding to discharge core(Very little impact)

SMPS Specifications:
Vin: 185~240vac
Vout: 38v - 700mA

Leakage inductance : 3~8 microH
PWM Generator: UC3845D
Feedback Controller: TSM101A

What do you exactly mean with "spike"? The flyback pulse at the primary winding?

Where should the stored core energy be transferred according to your design?

If you have a "desaturation" winding, what's the respective winding ratio?

How about showing a complete schematic?

Why did you choose a forward topology?

What's the yellow trace in the oscilloscope image?

Hi FvM
Thanks to reply

1. I mean the Spike is the large voltage in the primary winding due to leakage inductance in the transformer
2. Leakage inductance
3. Desaturation winding ratio with primary winding is 1:1
4. I attach schematic without Snubbers and Clamp circuit.
5. I use forward topology because i want to give variable voltage and current from output to drive LED panels.
6. This trace is gate waveform in no load.

Mr.FvM excuse me for about my bad English.
Thanks for your help

You should be able to reduce the overvoltage by realizing a closer coupling between primary and desaturation winding.

What's the intended duty cycle range for the converter?

Thanks dear FvM
I don't know why can't reduce with desaturation winding!!!
My maximum duty cycle is 40~45%!

in blow picture you see my problem

The 720 mV gate signal is pretty below MOSFET threshold (presumed you are measuring at the gate directly) and thus shouldn't make the MOSFET switch on. It's caused by Cgd and the gate resistor respectively driver impedance. If you further increase the gate resistor level, the transistor will switch on during flyback pulse and absorb the leakage inductance energy, reducing the spike amplitude but increasing losses.

Hi again my Friend
I think my some of problems related to the Feedback network! Because in no load duty cycle change form 1% to 23% and not stable!

One other question:
when i measure voltage of source pin of MOSFET, the waveform of this pin is very very bad and have to many spikes ! I read Current sense pin description form datasheet and written was a time constant of RC filter is approximates the spike voltage duration, i changed R=220R and C=470pF, but unfortunately not any thing change!

When you shut off current through the primary, the flux field starts to collapse. It wants to generate current somewhere, but it cannot do so, because there is no load at the secondary.

So instead it generates a voltage spike in the secondary, or in the primary, or both. It may even create a spark if the energy is sufficient.