JTAG machine in FPGA?

[davorin]

fpga flash jtag

Anyone seen some example of a JTAG state machine in FPGA?

Say I attach an external memory as programming source and FPGA programs the flash of an attached JTAG capable processor...

 

[dainis]

jtag master state machine

**broken link removed**

 

[davorin]

example fpga jtag program

This is for an existing SoC design to enable JTAG boundary scan and debugging...

I meant running a JTAG machine for controlling an external JTAG CPU to program flash....

 

[dainis]

how to program fpga through jtag

This is for an existing SoC design to enable JTAG boundary scan and debugging...

I meant running a JTAG machine for controlling an external JTAG CPU to program flash....

You asking for JTAG "master" controller in FPGA ?

 

[davorin]

fpga jtag flash

Exactly...FPGA controls TMS, TCK, TDO...but I guess it hasn't been done before....

 

[Git]

send data to fpga over jtag

Can you explain a bit more of what you are doing Davo?. Is this Altera chip with NIOS and flash memory for its program?. If so, surely the Altera chips have a JTAG port like the Xilinx chips do?. If the FPGA has a jtag port and the flash memory is connected to fpga pins then it can be programmed from the fpga jtag port. (The flash has to have data, address and all control pins connected to fpga pins which are inside the boundary scan)

Git

 

[davorin]

fpga and jtag for processor

Was more thinking of fast flash programming through controlling others CPU JTAG pins by Altera FPGA (o;

Sort of copy attached flash to FPGA via JTAG to flash attached to Coldfire CPU (o;

Maybe better to do the JTAG pin control via small IP CPU core and software...

Alread have software for flashing memory in nios board (o;

 

[MTTS0020112]

how to write to fpga jtag

you can write the desing according to IEEE1149.1

 

[davorin]

jtag fpga

Please not again a "useless" post....


I know what JTAG is according to and how it should behave...