Hi all..
I have been trying to simulate j k flip flop with preset and clear in cadence using nand gates and one using d flip flop but the output
is not varying it is always d same.. I have tried to do in different ways ,using nor gates master slave.. but never got d output..
plz help me by telling an efficient way to design d flip flop in cadence
thank u
I expect this is a hookup or stimulus problem, not pertaining to Cadence
particularly. Certainly you could find schematics of JKFFs that are known
to work.
Maybe it would help you to start small, like the simplest SRFF, and get
your simulation to work with fewer things in play.