dayang
Newbie level 6
Hi
How can I design such a latch, that it's input is logic high and low ( dvdd dgnd),and clock. And it's output is two voltage level.for example when input is high and clock is high the output is 1.8v, when input is low and clock is high the output is 0.6v.(vdd is 3.3v). how can I realized it using minum transisters, and is there any articles tell about it? I want to use such a latch in current steering dac to reduce the glitch.Thanks
Added after 13 minutes:
the waveform is attached
How can I design such a latch, that it's input is logic high and low ( dvdd dgnd),and clock. And it's output is two voltage level.for example when input is high and clock is high the output is 1.8v, when input is low and clock is high the output is 0.6v.(vdd is 3.3v). how can I realized it using minum transisters, and is there any articles tell about it? I want to use such a latch in current steering dac to reduce the glitch.Thanks
Added after 13 minutes:
the waveform is attached