Issue with VSS currents for a converter in DHspice

[shrivastav]

VSS currents in dhspice

Hi,
I am trying to get the currents through VSS (ground) for a normal inverter. I am doing this as a first step in understanding the current through VSS for a big block.
Strangely, what I am observing is that the current through VSS is an exact mirror image of current through VDD. I would have expected that I see some I(VDD) when pmos of the inverter is charging the output cap, and I(VSS) when the cap is discharging.
My I(VDD) seems reasonable, but I dont see any I(VSS) during discharging, and I(VSS)= -I(VDD) during charging.

my circuit is very simple, its something like this:

mxi1 V_d V_g vss vss TN
mxi2 V_d V_g vdd vdd TP
C_out V_d vss 4e-15


then i am providing some periodic waveform to the input node (V_g), and plotting I(VDD) and I(VSS)


thanks,
shrivastav

 

[Hughes]

Re: VSS currents in dhspice

Hi shrivastav,
Maybe the complete netlist is as follows:

mxi1 V_d V_g vss vss TN 
mxi2 V_d V_g vdd vdd TP 
C_out V_d vss 4e-15
VDD vdd 0 2.5
VSS vss 0 0.0
VG V_g 0 pulse 0.0 2.5 0.0 100p 100p 1n 2n
.probe tran i(vdd) i(vss)
.tran 10p 10n
.option post
.end

As shown in the netlist, node 0 (hspice ground) has three branches connected -- VDD, VSS and VG. According to Kirchhoff Current Law, I(VDD) + I(VSS) + I(VG) = 0. The current of VG usually can be ignored. Therefor I(VSS) is about -I(VDD).

If you want to see a different current through VDD and VSS, you may change the MINUS terminal of C_out to node '0'.

C_out V_d 0 4e-15