[SOLVED] Issue with Contactor Driver Circuit – MOSFET Burns at Higher Voltage

Recker039

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Hello everyone,
I have designed a contactor driver circuit that operates in two modes:
  1. It initially provides an inrush current (limited) to the contactor coil to engage it.
  2. Immediately after engagement, it supplies a constant holding current of approximately 50mA.
This topology worked well for 95A contactors. However, when I scaled up to high-power 265A contactors, I encountered issues.
  • For the 95A contactor, it engages with an initial current of 3.5A.
  • For the 265A contactor, it requires approximately 6.5A to engage.
Problem:
When operating at voltages between 110V and 180V, the MOSFET does not burn. However, above 180V, the MOSFET burns immediately when I switch on the circuit.
Some colleagues suggested:
  • Increasing the gate resistance
  • Adding an RCD snubber in parallel with the existing snubber
However, these modifications did not resolve the issue.
Components used:
  • MOSFET: STP30N65M5
  • IGBT (tested but same result): FGH60N60SMD
I would appreciate any insights on what might be causing this issue and possible solutions.
Thank you!

 

Solution
C
It sounds like the voltage across your shunt is going up and deleting from the VGS...so the FET is in linear region.

What is the required coil voltage and current of the contactor's control coil?......surely the contactor's control coil shouldnt be across the rectified mains?
Or is that a "low side buck converter" for driving the contactors coil?....beware your 250m inductor is saturating?
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TL;DR I'm not sure why the cause of heat is a misunderstood. It shows high power spikes on the edges which are due to all node capacitance from Coss of FET , and clamp diode.

By some limited choices in LTspice I reduced the FET average power to 170 mW (1.2kWpk) using a low Q FET and a low Q clamp diode.
 

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  • Buck contactor coil driver_TS.zip
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Do you guess about the power dissipation of the Mosfet?
 

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No LTspice measures power Alt+ hover of part (click thermometer) and if you select trace label then again Alt + click, it will parse to a cycle and display avg P in the period in a small box on screen.
 

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Ah yes - we can't see the layout - turn off spikes will easily kill the mosfet when you get above 180VDC supply - a good scope would see this straight away

explains sort of OK operation at lower Vcc
--- Updated ---

Also - at the higher Vcc - RF can easily get into the controller and upset things.
 

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Leading edge power spikes (green) were observed in the initial simulation provided and reduced with my low Q=CV choice of semi's. Rated > 600V.

But this wasn't actual parts used nor had any layout parasitics been included.
The TS (thread-starter) ought to do this to simulate the failure again and confirm root causes.

 

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Forum has asked for pictures of design/prototype, and scope shots of
it working at lower V, eg gate/drain transients.

We can hopefully stop the guessing and get to the root problem.
 

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The snubbers are too small for HV operation - as said just above - if we can see G-s and D-S at turn off at 150V - then the issue will reveal itself

( waveforms at turn on too will be useful )
 

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Easy peasy said:
The snubbers are too small for HV operation - as said just above - if we can see G-s and D-S at turn off at 150V - then the issue will reveal itself

( waveforms at turn on too will be useful )
Click to expand...
supply voltage is 150Vac.
Vgs: (Volt/Div divide by 2) => example: Min Volt is 57/2 = 28.5V


Vds: (Volt/Div *5)=> example: MAX Volt is 38*5 = 190V


I am changing shunt resistor value to 0.54 ohm.
Vs:
 
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Last 3 of your pics unlabeled.....? What test point are they ? What are we looking at ?

You are violating Vgsmax specs -



What is the sampling rate scope screen shots acquired ? Scope probes set to 10X right ?


Regards, Dana.
 

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I dont have any idea about Vs peaks...
--- Updated ---

I calculated the probe attenuation for you... and wrote it in front of each image as a multiplication or division. Vsource-gnd doesn't have probe attenuation.
 
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Vds looks like too noisy with probe capture errors. Is it calibrated and probed well?

Gnd path < 2 cm , < 5 ns Tr , flat. , show calibration with probe, 10 MHz pulse

1:1 probes with a R divider is NG
 
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Tony made a great observation, you have 100V of noise on Vdd ? Thats crazy.

What are you using for caps on Vdd, combo of ceramic and tants, polymer tants
best in bulk class.



OS-CON is polymer tant.
 

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Recker039 said:
supply voltage is 150Vac.
Vgs: (Volt/Div divide by 2) => example: Min Volt is 57/2 = 28.5V
View attachment 197771
Click to expand...
This one especially does not make any sense. Suggests some major issue with how you're probing it, or some huge parasitics somewhere in the circuit itself.

From your schematics, it seems that the circuit is supplied from a bridge rectifier, so unless you use an isolation transformer on the AC supply, you can't connect your scope GND anywhere on your circuit. Are you using an isolation transformer, or a differential probe....?
 

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I used an insolated probe.
 

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I suspect the hold current is DSO noise with PWM in a slow sweep.

I indicated your leading edge current caused dynamic power loss and demonstrated a solution in a simulation.

The Vds snubbed pulse appears overdamped but ok.

Yet you closed the question as solved without listing solutions. It would be helpful to readers and courteous to do so.
 

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