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Is there anything that converts verilog to resistor, capacitor level design?

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I know that, some logic synthesis software converts verilog implementation to AND, OR etc gate represantation design. Is there anything that converts verilog to resistor, capacitor level design?
 
You can do it with Verilog-A.
But remember it is only modeling there is no "real" conversion.

For furrther details Serach - Modeling capacitors and resistors with Verilog.
 

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