Is there any parameter scaling law in mos scaling?

[Jeon.S.B]

i mean, Is there any conventional ratio between channel length and parameters like oxide thickness,junction depth and substrate doping?
if so, why?
I want to simulate 0.3um NMOS using silvaco. but i don't know how to determine oxide thickness, junction depth and substrate doping.
please help.

 

[Baas Rietrot]

Oxide thickness, junction depth and substrate doping is usually defined by the IC manufacturer you use. Usually constants dependent on the capabilities of their equipment.

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Scaling you say...

Hope it helps.

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Thus...

Power dissipation.

Power density remains unchanged.

In the case of constant voltage scaling (Keeping VDD and Vt0 the same)

Parameters W, L, tox and xj is scaled down by S.

NA and ND is increased by S²

Then,

Power dissipation.

Power density.

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Constant field scaling: The first set of scaling rules exist to keep the same field conditions in the transistor.

Constant voltage scaling: The second set of scaling rules exist to keep the same voltage levels in the transistor.