A thought after reading the many questions in this forum:
Even if the component designed is at requied speed or rate, the final "speed" of the device is also dependent of the pads too. Am I wrong? If my point is correct, then design of IO pads is equally if not more important with actual design of the component....
Yes, you are right. So at high speed communication the full swing logic can't work because the PAD driving is not enough. And rhe LVDS or other small signal output is developed.