Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Is it posssible to Skip Specific violations during routing in Soc NanoRoute.

Status
Not open for further replies.

pd_people-asrikanth

Newbie level 4
Newbie level 4
Joined
Oct 27, 2011
Messages
5
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Location
hyderabad
Activity points
1,299
Hi,


In My Design, during Routing some Violations like MinStep, Eol, Via Enclosure are found.

I wanna skip fixing " Via Enclosure " Violations during Routing Optimization Iterations, as I found these are not real violations in Calibre DRC.

Is there any Variable to set this facility or any other methods ???????

AnyOne Please help.................
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top