Is it possible to make Id = 15 ~ 30 nA ?

[sj95]

Dear All:

If use long length to set a MOS current mirror in saturation, then get a small current at output site, is it possible to make the output current = 15 ~ 30 nA ?

thank you

 

[evilguy]

depend on process. You need to bias transistor in weak inversion. however when you design for small current your W and L value will be small. smaller device mean difficult to match.

 

[debutant]

transistor in weak inversion can deliver a such small current.

Added after 16 seconds:

transistor in weak inversion can deliver a such small current.

 

[bigworm]

it is possible by current mirror.
while due to process variation,you may suffer from unexpected amount of mismatch.

 

[wdd]

Dear All:

If use long length to set a MOS current mirror in saturation, then get a small current at output site, is it possible to make the output current = 15 ~ 30 nA ?

thank you

Yes, it's simple.
I had drawn a circuit by hand, it can produce nano-amps current with all transisitors in saturation and normal value resistance.

 

[sj95]

Dear all:

In simulation, we can produce the so small current easily.

But in a real situation, the so small current can flow in the path ?

Before the current reach its destination, it becomes zero because the leakage, doesn't it ?

Or in a switching circuit, the clock noise or glitch affects the current, then the current becomes trivial, and can't have normal function ?

thanks

 

[leohart]

Dear All:

If use long length to set a MOS current mirror in saturation, then get a small current at output site, is it possible to make the output current = 15 ~ 30 nA ?

thank you

From the first order, Idsat=0.5(W/L)(Vgs-Vt)^2,so there is two way you can get tiny Ids,namely,small W/L or low Vgs-Vt.For the former case, you have to use reasonable big L to satisfy W for matching.The latter is hard due to Vt variation,so have to make it reasonable big to reduce the error.

anyway,this is just first order consideration...Even you can get rid of two above issues,the large L small W mos is not typical for Vt parameter given by foundry,the Vt will varies due to geometric effect,you have to fix the error youself,just do test device tapout...

Maybe subthreshold can handle your requirement,but I don't know about subthreshold design,hoho

above are some of my thoughts,hope they are helpful

Added after 2 minutes:

Dear all:

In simulation, we can produce the so small current easily.

But in a real situation, the so small current can flow in the path ?

Before the current reach its destination, it becomes zero because the leakage, doesn't it ?

Or in a switching circuit, the clock noise or glitch affects the current, then the current becomes trivial, and can't have normal function ?

thanks

I think current at some nAs won't leak to zero so easily if the path is short enough and carefully isolated

 

[evilguy]

even femto ampere current can be generated. please refer to paper "On the design and characterization of femtoampere current-mode circuits" by Bernabe Linares-Barranco and Teresa Serrano-Gotarredona.

 

[pfd001]

Dear All:

If use long length to set a MOS current mirror in saturation, then get a small current at output site, is it possible to make the output current = 15 ~ 30 nA ?

thank you

It depends on your process. The leakage current is significant with so low bias current. You should discuss your foundry with this issue

 

[Fom]

Hi, wdd!
It seems your circuit is wrong.
Suppose left-side current is 1uA and resistor 1M.
Voltage drop on resistor should be 1V. In this case Vgs of right-side transistor is almost zero. So the current also zero. It is not a mirror.

 

[Jim cage]

You can use the widlar reference with large resistor to create nano amps of current. this is one of its application.

I=dVbe/R