is it correct to have filler cells being overlapped in floorplan b/w core and die

[Pravesh_Rathee]

hello everyone.
I am doing floorplan for my design. I am using tcl file in ic compiler. One of the command is for creating corner cells and then one command is for creating vcc and ground cores.I am creating 6 vcc and 6 ground core cells. after executing these commands I see the CEL window and place the corner cells and core cells of vcc and ground manually. Then i run filler cells command. The filler cells do get filled but i get them overlapped at boundary of core cells of either vcc or ground.
Overlapped cells are always 1D FRAM.
Is it correct to have them overlapped. As per my knowledge I don't think it should be correct.
I am unable to remove that overlap.
If wrong,What is the technique to remove it ?
The tcl script i am running is shown through below images:
First I am executing first image script and then second image script.






Please let me know if any doubt is there.

 

[dick_freebird]

Question is, -what- overlaps. Leaf cells may have
extent beyond the butting lines, to make them DRC
clean in isolation. Now collision of real features, might
be bad. You should inspect and decide what is touching
(might not even be real, just some boundary polygon
in the fill cell, an oversized text, ???)

Might even do an advance stream-out and use a viewer,
you'd be past all the abstraction and bogus layers that
add more clutter than clarity.

 

[Pravesh_Rathee]

here in the image you can see the core cell and filler cells.
cells 330 and 329 are being overlapped , white boundary is filler 330 and green boundary to it is 329 .
This is the problem I am facing at each vcc core or ground core i.e. cells being overlapped

 

[ThisIsNotSam]

Are these IO cells? Overlaps are common.

 

[Pravesh_Rathee]

these cells are present between the core and die to fill the gap apart from vcc and ground cells.

 

[ThisIsNotSam]

these cells are present between the core and die to fill the gap apart from vcc and ground cells.

vcc cells? ground cells? core cells? sorry, your terminology is just too weird. are you building a pad ring, yes or no? if the answer is yes, overlaps are common.

 

[oratie]

You see overlapped cell because you have specified "-overlap_cell EMPTY1D". Without this option - no overlaps.
Another question: is your IO library allowed overlapped cells? You should check app_notes for this lib.

 

[Pravesh_Rathee]

yes...pad ring..
THankyou