Rajalakshmi.E
Newbie level 4
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How to create IP CORE from verilog code in Xilinx ISE
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My final year project is I have to convert my verilog code into IP CORE..
My final year project is I have to convert my verilog code into IP CORE..
In #7 the OP has mentioned that it is needed for final year project. So it is my speculation that the OP is a newbie and is unaware of the design practices.