Hello, why my inverter output is like the one shown in below image1? what could be reason. I increased the NMOS and PMOS dimensions and I got the Image2, that kind of fixes the problm But I really don't know the reason for the plot in Image1.
The reason is that your inverter was not fast enough to drive this frequency. The propagation delay is given by:
\[ IDsat=(\beta /2) {VDsat}^2 \frac{W} {L} \].
So large W, means large current capability which makes the load capacitances charge faster. In other words, large W means more transistors in parallel which means smaller RC (time constant of charging/discharging) and consequently faster response (higher frequency capability).
You can try your circuit with smaller W with a lower frequency and it should work.
Hello circuitking ,
In the waveform there are spikes at the edges. These spikes often result from missing body to source connection.
Do check for that also in your design.
Also mind when you dimension this also results in increasing self capacitance .So also keep this in check when going for upsizing of MOSFETS.