Introducing hold violation

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veeraj_patil

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I want to introduce hold violation in my design. This I can do by:

1.Removing any comb. logic between registered paths.
2.Positive clock skew.

Am i right? Is there any other way ???
 

As I know, we cannot introduce Hold Violations manually/through program....(please correct me)
 

I guess we can ...rather i managed to introduce it.I used 2 clocks and gave considerable amount of skew to violate the design.
 

@veeraj_patil,

I thought that hold time violations are something to do with the component that we use and not programming of the component.
Thanks for clearly my doubt as well!!
 

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