intrinsic gain of mos. Help Pleeeease.

intrinsic gain

how to simulate instrinsic gain of a mosfet as a function of vds. Thanks in advance.

intrinsic gain of a cmos transistor

I think you can try simulate it by loading it with an ideal current source. Now the question is whether you want it for 1 current bias or for different current biases.

eda board intrinsic gain of mos

hi aryajur, i want it for different currents finally, but for now tell me how can i get intrinsic gain of mos as a function of vds as we know ro is a varying small signal parameter w.r.t vds. i have seen a particular test bench in ee240 notes of UC berkeley, i have simulated it but i don't know how to get that intrinsic gain Vs Vds.

how to simulate intrinsic gain of transistor

To get it as a function of Vds you would need to do the AC analysis in the following setup and sweep the Vds for the AC analysis. See the test setup picture attached. The Feedback will force the operating point to be evaluated to a Vgs which ensures that your Vds is the same as what you are sweeping.

how to simulate mos ft

hi aryajur, thanks for your answer, i have a small doubt-> won't that vac=1v be large signal? or it should be some thing small.


really thanks for your help.

mos intrinsic gain

VAC=1 would be input only in AC analysis when your MOS model and everything else is already linearized. So when you look at the voltage of the drain in the AC analysis then your gain will be simply V(drain)/1 since you put Vac=1 so your gain will be simply V(DRAIN) if you put Vac=0.2 or anything else your gain will be V(DRAIN)/0.2.
Putting VAC=1 or even VAC=100 doesn't make any difference to the analysis since this is not an actual DC or transient voltage so it doesn't represent any real voltage. It is just a magnitude that will be used for analysis in the linearized circuit and all other magnitudes you read out from the circuit for the AC analysis will be relative to that, thats the only significance. Just try it. Put Vac=100 that should just cause all AC analysis voltages to be just 100 times with what they were for Vac =1 without changing any performance or curve shapes.

intrinsic gain of an nmos

This linearized model for ac analysis is the catch, i understood , this is the important point for me to note. Thanks.

i have one more question, how can we get ft of a mos w.r.t Vgs. Thanks in advance.

I can't think of a direct way to get the ft vs Vgs graph, only that you run multiple simulations and measure the ft value for different Vgs and then plot them in a spreadsheet or something.

hi, i have tried the circuit you mentioned but it didn't work out, please help me through this i am getting a gain of around 10m or so for W=2u L=0.18u, which isn't true. Thanks in advance.

Added after 12 minutes:

The problem is , in ac analysis even the vcvs is amplifying. so it is not allowing the drain voltage to change so it is not showing what is expected so, aryajur, can you suggest any way to get with this problem. i have changed vcvs gain from 20 to 1000 to test, if it makes any difference.

Added after 10 minutes:

i have tried by keeping a vely low cutoff frequency lowpass filter in between the vcvs and vac source then i was able to get the intrinsic gain w.r.t vds. is there any other method you can suggest aryajur, im thankful to you for your discussion.

Instead of a low Pass Filter from VCVS you can place a AC block filter. From the VCVS to Gate put a resistor with a DC value of say 1e-5 ohm and a AC value of say 1e18 ohm. Then Place the Vac source from ground to a resistor of DC value 1e18 and AC value 1e-5 and connect the other end of the resistor to Gate. Like in the attached diagram.

In my opinion, you should introduce a ideal opamp into the testing circuit to form a negative feedback.the output of the opamp is connected to the gate of the MOS transistor, the positive input is connected to the drain of the MOS transistor,then you can do the .DC analyse with the source connected to the negative input of the opamp.

Thank you for this info. It helped me also