Intrinsic delays means the delays which are due to the internal gates which are there in ur flipflop which may not propagate the data properly
Fanout delay means ur driving capability is more than the expected...suppose ur constraint is 20 for each cell and ur cell is driving more than 20 then it is a fanout delay..
Intrinsic delay is the delay internal to the gate(in other words gate delay). To be more clear, the time taken by the gate to produce a output after giving the input.
Fanout delay is the driving capability of the gate(the number of loads a gate can drive).
Internsic delay is the delay internal to the gate. Input pin of the cell to output in of the cell.
Delay contributed due to internal capacitance of the transistors.
Delay when no external load is connected.
Fanout Delay is due to the fanout load.
its function of i/p transition time of cell, Cnet+Cpin .