Interrupt example on ZedBoard

arminb73 said:

Anyone who knows a good source of practice using Interrupts on ZedBoard?
I know the brief idea, that the CPU should be busy doing important tasks, and when one of the peripherals sends their interrupt signal it should be paying attention to this peripheral

My design looks as so. Connecting sin to sout with a physical wire through the PMOD GPIOs and the interrupt signal to the PS through another physical wire (as seen on second image). My question is now how can I verify that interrupt functionality works ? At what case is it normal to throw a interrupt considering UART data transmission?
View attachment 174756

Click to expand...

Hello @arminb73,

I am wondering if you could to connect output with intterupt from AXI-UART to CPU interrup input - similarly as I did on b-Design with microblaze softcore - see pdf attached to this post.
After you finished b-design you have to generate "HDL Wrapper" for it and then export-hardware to SDK/Vitis and make new project in it. After that you have to write adequate program in C for handling interrupt from UART by CPU.

BTW: you can write down the b-design in PDF file, it would be more readable in post.

Best Regards

@arminb73,
I can direct you to an Interrupt tutorial that might clear up things.


I found the following tutorial on interrupt to be very helpful. It is just that the Vivado version is too old. But the principle of implementation should be similar.

At what case is it normal to throw a interrupt considering UART data transmission?

Click to expand...

A UART to send data usually needs a Tx interrupt to tell HW, be it DMA, or a polled
situation, to service the UART FIFO or load new data to send or both.

On Rx side when UART receives data it flags the system via interrupt to take the
data and move it/ service it. To insure data stream does not "overrun" the UART
data buffer (usually a circular buffer) or FIFO insuring data is not "lost".

Interrupts normally used because polled situations limit max data rate. And/or other
interrupts / tasks using CPU time. Helps to prioritize handling of high speed data
streams.



Regards, Dana.

FlyingDutch said:

Hello @arminb73,

I am wondering if you could to connect output with intterupt from AXI-UART to CPU interrup input - similarly as I did on b-Design with microblaze softcore - see pdf attached to this post.
After you finished b-design you have to generate "HDL Wrapper" for it and then export-hardware to SDK/Vitis and make new project in it. After that you have to write adequate program in C for handling interrupt from UART by CPU.

BTW: you can write down the b-design in PDF file, it would be more readable in post.

Best Regards

Click to expand...

Hello,

I agree with the direct connection from AXI UART interrupt to CPU interrupt. I just do this in case I want to connect the interrupt signal to my oscilloscope, just to visualize the signal (practice reasons). I am feeling quite relaxed with the Block design side of my project. It's as soon I've exported my design to Vitis and start embedded C I begin to struggle. I just don't know how to verify that interrupt works as planned being, any idea how I can prove this?

Thanks

Best regards,
Armin

dpaul said:

@arminb73,
I can direct you to an Interrupt tutorial that might clear up things.

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I found the following tutorial on interrupt to be very helpful. It is just that the Vivado version is too old. But the principle of implementation should be similar.

Click to expand...

Hello,

I've looked at this document before. The tutorials are quite good! I just find myself being overly confused when the interrupt exercise was introduced. I went through with it but did not understand it fully. Right now I am looking at different projects online, trying to understand how the different peripherals take into the usage of the interrupt signal (and to understand how to think when doing embedded C).

Best regards,
Armin

danadakk said:

A UART to send data usually needs a Tx interrupt to tell HW, be it DMA, or a polled
situation, to service the UART FIFO or load new data to send or both.

On Rx side when UART receives data it flags the system via interrupt to take the
data and move it/ service it. To insure data stream does not "overrun" the UART
data buffer (usually a circular buffer) or FIFO insuring data is not "lost".

Interrupts normally used because polled situations limit max data rate. And/or other
interrupts / tasks using CPU time. Helps to prioritize handling of high speed data
streams.

https://www.ti.com/lit/ug/sprugp1/sprugp1.pdf

Regards, Dana.

Click to expand...

Hello Dana,

Appreciate the information, will have this in mind when writing the SW code.

Best regards,
Armin

Hello,

if transmission by UART would be working - it indicates that interrupt is working.

Best regards

Hi,

To verify that the interruot is working:
* just set a port pin HIGH at the beginning of the ISR and LOW at it's end.

With this simple way you can cerify a lot: function calls, counter values, switch-case events...

Klaus

Or simply set a breakpoint inside the ISR. This technique is somewhat dependent on tool
used, and how it handles this breakpoint, so reading the IDE manual prudent.


Regards, Dana.

So, I've revised my block design to look like this: (see PDF attachment).
External ports are linked in this manner (see image attachment).

The Vivado hardware design has been exported to Vitis, and I'm currently working on an application project that implements interrupt on both the receiving and sending sides.
This is where I've gotten myself into trouble...

I found Chapter 2 of "The Zynq Book Tutorial" (attached) to be particularly helpful, and I now have a better understanding of how interruptions function in general.
I've also included the chapter's source code (see zipped folder).

I've been attempting to apply the same structure to my UART interrupt design as in the example, but I'm having trouble coming up with a simple interrupt UART example.

I'd be grateful if someone could assist me in writing a basic UART interrupt program.

Best regards,
Armin