Handling an interrupt is a 'hardware' thing that the processor does.
Typically when the hardware sees the signal that an interrupt needs to be serviced, it will complete the current instruction, push the PC and status register (whichever that is for your device - normally holds the current state of the CPU in some way) onto the stack and then loads the ISR address into the PC and configures the status register to show that it is processing an interrupt.
IT is similar to a subroutine call *BUT* more is pushed to the stack. This is why the compiler/assembler needs to told that it is handling an ISR as there is a separate 'return from interrupt' instruction that needs to be executed to restore the PC and the CPU state to that before the interrupt is serviced.
If you have a processor that has multiple priority interrupts then the process is exactly the same except that a high priority interrupt is allowed to interrupt a lower priority one. If a lower priority interrupt is executing then, when the higher priority one is triggered, the 'status' register that is saved will remember the lower priority state and that is the state that will be restored when the higher priority ISR completes.
Susan