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Internal layer clearance in offline SMPS?

cupoftea

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Hi,
We require 6mm of clearance between the primary and secondary tracks.
Primary is mains connected, and secondary is provided from the output of the SMPS transformer.
Blue is bottom layer copper, and as can be seen, we succeed in getting the
6mm clearance between bottom layer tracks.
However, dark yellow is 3rd_layer_from top (ie, "layer 3" of a 4 layer board).
You will see that we only succeed in getting 4.9mm of clearance from the
bottom layer copper to the layer 3 copper.
However, there is 0.2mm thick pre-preg layer between bottom layer and 3rd_layer.
As such, would you agree, the 4.9mm of clearance is fine? (since the prepreg
lies between bottom layer and layer_3)


Even during a 4kVrms (5.6kV peak) hipot test you still wouldnt get flashover
over the 4.9mm clearance since the pre-preg would stop this.
Now , supposing the hipot test voltage is increased by 100V at a time until flashover occurred...
Between which two tracks would the flashover first occur?..(ie between the bottom layer tracks, or between the bottom_layer and layer_3 tracks.
Do you agree, it would first occur between the bottom layer tracks?, since they have no pre-preg separating
them.
 
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