[SOLVED] Interfacing LogiCore FFT 7.1 block

[panos_papajohn]

Hello everyone,

I used Xilinx's core generator to create a fft block. How can I connect it to another vhdl script that I have written?

Thanks in advance

 

[devil6600]

panos did you figured it out? i also wanted to know the same, in case if you know how to do it please let me know...

 

[panos_papajohn]

Actually the answer was pretty simple. I did a long time ago but I forgot to reply, so I apologize. Read about instantiation in VHDL. You must connect the ports of the FFT block to another entity that you built. Be sure that you connect scale_sch_we, fwd_inv_we and start ports. The scale_sch and the fwd_inv port can have a constant value. When you do the simulation be careful with the timings of each signal. Let the signal start to take a High value for at least 1us. But then again that depends of the core's architecture that you chose.