Inrush current limiter+Bias PSU for mains powerd ZVT converter

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CataM

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Hello everyone,

I am trying to see if it is possible to make a 1kW ZVT converter (phase-shifted full bridge) using the UCC28950 directly powered from the AC line (no PFC stage).

The first problem that arises is the RMS current through the bulk cap after the rectifier bridge, but I believe that allowing sufficiently high ripple voltage, I could lower the RMS current to acceptable levels... and then lower its influence in the output voltage with sufficiently high loop gain.

However, the big problem that I see is how to limit the inrush current during the pre-charge of the bulk cap.
Well, I can try to implement the usual inrush current limiter with resistor that is then shorted by a relay, but then brings me the 2nd problem which is the Bias PSU for the relay activation + gate drivers, because if the Bias PSU is directly driven from the mains, it might happen for the inrush current transient to last longer than the bias PSU to reach its voltage and hence deactivate the inrush resistor which would be a fail.

I was looking at how the bias PSU is derived in PFC converters (see e.g. this: https://www.ti.com/lit/df/tidrls7/tidrls7.pdf) but I do not understand why it is derived from the output of the PFC and ensures that the transient of the inrush current is over ?

Can anyone help me understand the following:
1) Regardless of any regulation about power factor, is it any other issue I do not see in powering the ZVT converter directly from the AC mains ?
2) Can anyone recommend how a Bias PSU can be derived in such a converter derived from the AC mains ?

Any comment is much appreciated ! Thank you for your time !
 

to limit inrush, you use a current clamp in the low side.......you know, the type using a fet whose gate gets pulled down by a bjt...and the vbe of the bjt is across the inrush resistor......the fet is driven on from high value resistors from the positive dc bus.
So, that is what you need for your inrush...a current clamp.

But to segway a little..

https://www.edaboard.com/threads/342663/


..the PSFB is a bit of a "dodgy" SMPS anyway...as the above thread shows........Easy Peasy, the expert SMPS person, was arguing for it, but close scrutiny of his argument showed that he was actually arguing for a highly modified version of the PSFB....not that this belittles his enormous skill in any way...just that he was arguing a slightly different point than was actually being made in the first place.....which, i might add, was very interesting and informative from Easy Peasy anyway.
 

Sorry treez, but I did not get this.
You are saying that the FET is being pulled down by a BJT and then the Vbe of the BJT is across the inrush resistor ? I can not picture that since the inrush resistor is in the line right? How comes a resistor in the line is connected to the base emitter of the BJT ?

Can you show a schematic ?
 
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    T

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Yes ill send you a schem soonest.
It is a standard circuit.
Put a resistor in the DC side, just downstream of the mains bridge.
Then put a FET across this. (DS across the resistor)
Then arrange a BJT such that when the current in the resistor goes above x amps, the fet clamps the current to x amps.
ie, make the resistor equal to value 0.7/x Ohms
 
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    CataM

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I was looking at how the bias PSU is derived in PFC converters (see e.g. this: https://www.ti.com/lit/df/tidrls7/tidrls7.pdf) but I do not understand why it is derived from the output of the PFC
Because the PFC is based on a boost converter, the output voltage will be a somewhat steady DC voltage even before it's active.
and ensures that the transient of the inrush current is over ?
By the time the bias PSU is active, the inrush is likely already over. The startup time of the bias supply will be determined mainly by R125+R126+C120. Should take several AC cycles to start working properly.
 
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    CataM

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