Inrush Current in LDO

[girih192002]

how to suppress in-rush current or switching current in low dropout voltage regulator design?

how we can build soft start circuit to avoid this effect ?

 

[cdh7]

Hi,

Here's an example showing how to limit current to about 1.5A. I think for lower current, that's the easiest way to do it.

For higher currents, search for the application note "Active Inrush Current Limiting Using MOSFETs".

Regards,
Chris

 

[girih192002]

Hi,

Here's an example showing how to limit current to about 1.5A. I think for lower current, that's the easiest way to do it.

For higher currents, search for the application note "Active Inrush Current Limiting Using MOSFETs".

Regards,
Chris

Hi Chris,
i search for Active Inrush Current limiting using MOSFET. but i didnt find any document. if you have then can please upload here. i will be very thankful to you.

 

[cdh7]

Hi,

Here is the application note.

Regards,
Chris

 

[dick_freebird]

Some ICs use a shutdown pin which has a buried ramp
circuit behind it, such that output ramp is controlled and
inrush current becomes output capacitance times output
ramp rate.

Also seen some where the ramp is made by pullup current
of the shutdown pin, and an external cap. This needs an
open-drain driver for the shutdown pin though.

If you had a design with explicit current limiting then you
could grab ahold of the reference current and override it
with something initially zero, that ramps. Or just let it snap
on at rated Imax (maybe not limited enough, if there's a
gang of 'em).