input impedance to ADC pin on PIC16F18856

[treez]

Hello
Concerning an ADC pin on a PIC16F18856, the maximum input impedance is stated as 10k into the ADC PIN.
However, supposing I have 100k into an ADC pin, but with a 470n capacitor on the ADC pin…in that case, would you agree that as long as the rate of ADC sampling of the 470n capacitor voltage is not too high, then the 100k is fine?

PIC16F18856 datasheet
https://ww1.microchip.com/downloads/en/DeviceDoc/40001824B.pdf

 

[betwixt]

The impedance isn't caused by the PIC, it is the maximum impedance you can feed it with to achieve full ADC speed. If the input current is limited it slows the charging of the internal sample & hold amplifier which then limits accuracy at high speed. If you have the input shunted with 470nF the impedance will be very low anyway, all you need to worry about is the 100K/470nF time constant.

Brian.

 

[pjmelect]

As long as the sampling rate is low enough then what you sugest will be fine. As the sample capacitor is only 5pF 470nF may be more than you need. Don't forget about input leakage though.

 

[treez]

Thanks, i see, all's we've got to do is charge up that internal S&H capacitor, and account for the littlle bit of leakage current

 

[pjmelect]

If the resolution of the A-D is 12 bits then the capacitor needs to be at least 4096 X 5pf to get 1 bit resolution which is just over 20nF I would suggest the use of a 47nF capacitor. As for the leakage you may want to add a pot to trim the results or do it in software.

 

[Aussie Susan]

While what pjmelect says is true, practically speaking you are doing well to get 8 to 10 bits out of an 12-bit ADC with any real value - the least significant bits are typically noise. Of course there are techniques to overcome this (averaging over a number of samples) but that adds time.
So it all comes down to the classic trade off of precision vs time.
Susan

 

[KlausST]

Hi,

If the resolution of the A-D is 12 bits then the capacitor needs to be at least 4096 X 5pf to get 1 bit resolution which is just over 20nF I would suggest the use of a 47nF capacitor. As for the leakage you may want to add a pot to trim the results or do it in software.

I don't agree.
Resolution is not influenced by input impedance, the capacitor will influence accuracy and precision.

And about leakage current:
With an ADC you have two types of input current:
* one is the low static input current (usually no big problem)
* the other is the sample frequency dependent current (to charge the S/H capacitor)
This is the more problematic current. It makes the reading dependent of sampling rate...especially with high source resistance and it does not care what size of capacitor you use. The capacitor just changes the time constant tau.

Example: 5pF S/H capacitor. Discharged to 0V during conversion. It takes about 8 tau to get less than 1LSB error. This means 400ns @ 10kOhms
As long as the sampling time is longer than 400ns the error will be less than 1LSB.
Now add an external capacitor. Let's say 470nF.
Now let's assume the voltage is 3V. With every sample the 5pF capacitor needs to be charged from 0V to 3V.
This causes an average current of 150nA @ 10ksmpl/s.
This means a voltage drop of 1.5mV @10kOhms. (Or 15mV at 100kOhms)
And this error can't be compensated by a capacitor.

Klaus

 

[pjmelect]

Example: 5pF S/H capacitor. Discharged to 0V during conversion. It takes about 8 tau to get less than 1LSB error. This means 400ns @ 10kOhms
As long as the sampling time is longer than 400ns the error will be less than 1LSB.
Now add an external capacitor. Let's say 470nF.
Now let's assume the voltage is 3V. With every sample the 5pF capacitor needs to be charged from 0V to 3V.
This causes an average current of 150nA @ 10ksmpl/s.
This means a voltage drop of 1.5mV @10kOhms. (Or 15mV at 100kOhms)
And this error can't be compensated by a capacitor.

I disagree, the 470nF capacitor effectively gives an impedance of zero ohms as far as the input to the ADC is concerned, the voltage of the 470nF capacitor voltage is reduced by the charging of the 5pF capacitor, so some time is required between samples to recover. I have implemented this in several designs and it works.

 

[treez]

Thanks, i see what you both mean.

so some time is required between samples to recover.

I think you are actually both in agreement , and are both correct.
Thankl for straightening this out for me.

 

[KlausST]

Hi,

I disagree,

I can't see in which point you disagree.
All what you write agrees with what I have written.

Klaus

 

[FvM]

I think the disagreement is in the prerequisites. The buffer capacitor method can work, but only for low sample rates. Assumed 10 kS/s is obviously too high.