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Input current of PFC contains DC at transients

Magnethicc

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Hi everyone,
I was wondering if anyone could shed light if DC current for AC PFC for the duration of 10 fundamental periods is a problem?

During steady-state operation DC current is measured at around 80mA (duration of measure is 10 fundamental periods) but during No Load to Full Load transients we see a DC current of 1A (due to assymetry between the positive half cycle and the negative half cycle) for 10 fundamental periods.

Is this a problem?
 
You could try reducing your feedback loop bandwidth to reduce this problem. Though its not really a problem since the standards bodies dont apply load transients during PFC/harmonics testing. I would ignore it.
 
Hi,

for a PFC you usually have some kind of rectifier ... thus there can be no preference of the one or the other half wave.

But for sure if the PFC output power rises/falls ... you will always see some short term DC component.
But this also may be a measurement artefact.

Example:
Let´s say the output power continously rises. Obviously the input current also needs to rise.
If you now just focus on the average of the half wave let´s imagine it rises with a constant rate of 50mA
P: 100mA
N: 150mA
P: 200mA
N: 250mA
P: 300mA
N: 350mA
P: 400mA
N: 450mA
P: 500mA
N: 550mA
P: 600mA
N: 650mA
and so on

Take the first full wave: positive 100mA, but negative 150mA ... makes some "offset" and a resulting negative average of -25mA over this full wave
next full wave: +200mA and -250mA --> again -25mA
next full wave: +300mA and -350mA --> again -25mA
you see "measure" a negative DC offset of continously -25mA
clearly "-25mA" is fact! .. you woud say.

But is it really?
Take the same numbers ... but now start your measurement with the negative halfwave.
First full wave: N 150mA and P 200mA --> now you get a positive offset of +25mA in average!
next full wave: +250mA and -300mA --> again +25mA
next full wave: +350mA and -400mA --> again +25mA
you see "measure" a positive DC offset of continously +25mA
"+25mA" is fact! ..
WAIT! we used the same input signal ... just a different window of time!

--> But one time we see negative offset and the other time we see positive offset. A clear measurement artefact!

Klaus
 
Yes thats right of Klaus to say.
Also, The whole subject of PFC for non constant loads is a "bag of nails"....you cannot realistically have a good power factor if your load is repetitive transient in nature.
 
To understand the actual problem, can you provide load and input current waveforms? Otherwise it's impossible to determine if you have just normal operation or excessive DC due to inappropriate controller design.
 
Yes, also please provide bom and schem. No worrys about sharing secrets as PFC schems and boms are all over the web.
 
usually done with good sized electro's
Thanks yes i agree, but the size of the electro bank can get impractically large for certain transient loadings.
I mean you get stuff like pulsed heater hair straighteners.....you just cant sell these things if you offer a product with a power supply thats a "chunker".
 
To understand the actual problem, can you provide load and input current waveforms? Otherwise it's impossible to determine if you have just normal operation or excessive DC due to inappropriate controller design.
I can tell you why this is happening - we use UCC28070 and transient load pulls down the measured output voltage of the PFC to below 2.8V (VSENSE) which then causes the 100uA to super-charge the VAO capacitor (this 100uA is a speed-up circuit for transients) and this causes VAO to change from one half cycle to the next.

VAO rises rapidly and to open up the PFC duty such that output voltage will quickly return to steady-state but this quickly causes 1 half cycle to be larger than the next half cycle which introduces a DC offset for 10 fundamental AC periods.
 
If your PFC'd supply gives a decent power factor and harmonics within limits when on constant load, then you should just forget about it.
Its not part of any standards test.
During one 10ms half cycle, there is a DC offset ....and no-one worries about this either.
You would have to add some sort of DC offset equalisation circuitry, and nobody would do this, nobody is going to pay for something thats not standards tested.
 
Thanks, you're right, but the smps downstream of it is essentially still giving a pulsed output to the PFC. The pulsing on and off is at pretty low frequency......low enough that it gives a problem trying to get decent PFC.

I have one 90-240vac product, where it was >100W average, and load was full load to no load repeatedly , and nothing else.....i just gave them an on/off controlled two tran forward.....it was fine.....regulation courtesy of just a comparator on secondary side looking at vout...and digi isolator to put this on/off feedback signal through to the primary side pwm controller.....the pulsed load was fed right through the 2 tran forward and to the PFC...which got a pulsey load essentially....and yes, the PFC was poor ...but when standards tested, they just ran the thing on constant full load, and we made it just drive constantly into that and we got through PFC.....was odd though, because the product would never ever be on constant load...but "thems the rules" (standards)

Ayk, there is currently a huge range of products which are average >75W but not allowed to be pulsey (this is a problem because they only work "pulsey") since it gives problems with "flicker" and poor PFC...but the rules are soon to charge and we will see lots of these products coming out soon in heating appliances, hair removal appliances etc etc.
 
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VAO rises rapidly and to open up the PFC duty such that output voltage will quickly return to steady-state but this quickly causes 1 half cycle to be larger than the next half cycle which introduces a DC offset for 10 fundamental AC periods.
Not completely clear. Is it real DC current offset over 10 periods or one asymmetrical half cycle which is seen as 10 cycles DC by your grid analyzer? The latter would be plausible.
I was asking for waveforms before.
 

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