Jan 20, 2005 #1 N nvtran Newbie level 1 Joined Aug 10, 2004 Messages 1 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 6 Anyone have ideas how to reduce clock jitter noise for input path?
Jan 20, 2005 #2 D dumbfrog Full Member level 3 Joined Jul 17, 2004 Messages 182 Helped 9 Reputation 18 Reaction score 5 Trophy points 1,298 Activity points 1,360 separate power supplies for input and output buffers
Jan 20, 2005 #3 rfsystem Advanced Member level 3 Joined Feb 25, 2002 Messages 908 Helped 149 Reputation 294 Reaction score 38 Trophy points 1,308 Location Germany Activity points 9,548 Built a PLL and filter out harmful frequency components.