fjrrulz
Newbie level 2
vsim 3015
I am designing a 4-bit counter with enable, load, reset, input data, output Y, and an overflow flag RCA. Here is my code:
Here is the test bench I wrote for the counter:
The programs compile fine, but I am getting the following warnings and errors during simulation:
Can anyone see my problem?
I am designing a 4-bit counter with enable, load, reset, input data, output Y, and an overflow flag RCA. Here is my code:
Code:
module counter(clk, data, Y, RCA, load, reset, enable);
input clk;
input [3:0]data;
input load;
input reset;
input enable;
output [3:0]Y = 4'b0000;
output RCA = 0;
reg [3:0]Y;
reg RCA;
wire reset = 1'b0;
always @ (negedge clk)
begin
RCA = 0;
if (reset == 1'b1)
begin
if (Y[3:0] < 4'b1111)
begin
if (load == 1'b1)
Y[3:0] = data[3:0];
else if (enable == 1'b0)
Y[3:0] = Y[3:0] + 4'b0001;
else
Y[3:0] = Y[3:0];
end
else
RCA = 1'b1;
Y[3:0] = 4'b0000;
end
else
Y[3:0] = 4'b0000;
end
endmoduleHere is the test bench I wrote for the counter:
Code:
module counter_test;
reg reset;
reg clk;
reg load;
reg enable;
reg [3:0]data;
wire RCA;
wire [3:0]Y;
counter counter0(clk,Y,reset,enable,load,RCA,data);
initial clk = 0;
always
#10 clk = ~clk;
counter counter1(clk,Y,reset,enable,load,RCA,data);
initial begin
reset = 0;
load = 1;
enable = 1;
data[3:0] = 4'b0110;
#25;
reset = 1;
#20;
load = 0;
#40;
enable = 0;
#20;
enable = 1;
end
endmoduleThe programs compile fine, but I am getting the following warnings and errors during simulation:
Code:
** Error: (vsim-3053) C:/Users/Fred/Desktop/Homework/counter_test.v(10): Illegal output or inout port connection (port 'Y').
# Region: /counter_test/counter0
# ** Warning: (vsim-3015) C:/Users/Fred/Desktop/Homework/counter_test.v(10): [PCDPC] - Port size (4 or 4) does not match connection size (1) for port 'Y'.
# Region: /counter_test/counter0
# ** Error: (vsim-3053) C:/Users/Fred/Desktop/Homework/counter_test.v(10): Illegal output or inout port connection (port 'RCA').
# Region: /counter_test/counter0
# ** Warning: (vsim-3015) C:/Users/Fred/Desktop/Homework/counter_test.v(10): [PCDPC] - Port size (1 or 1) does not match connection size (4) for port 'enable'.
# Region: /counter_test/counter0
# ** Error: (vsim-3053) C:/Users/Fred/Desktop/Homework/counter_test.v(15): Illegal output or inout port connection (port 'Y').
# Region: /counter_test/counter1
# ** Warning: (vsim-3015) C:/Users/Fred/Desktop/Homework/counter_test.v(15): [PCDPC] - Port size (4 or 4) does not match connection size (1) for port 'Y'.
# Region: /counter_test/counter1
# ** Error: (vsim-3053) C:/Users/Fred/Desktop/Homework/counter_test.v(15): Illegal output or inout port connection (port 'RCA').
# Region: /counter_test/counter1
# ** Warning: (vsim-3015) C:/Users/Fred/Desktop/Homework/counter_test.v(15): [PCDPC] - Port size (1 or 1) does not match connection size (4) for port 'enable'.
# Region: /counter_test/counter1Can anyone see my problem?