Improving Bandgap PSSR

[ccw27]

pssr bandgap

How can I improve the PSSR of the bandgap attached? I am only achieving PSSR of 30 dB.

Thanks

 

[Fom]

bandgap negative pssr

If it is your real schematic, why substrate of PMOS transistors not connected to VDD?

 

[ccw27]

In my real schematic it is. This picture was taken from a paper

 

[Fom]

That's wrong! You should connect substrate to VDD. Change it and simulate again. By the way do you simulate PSRR by AC or transient analysis?
And what is your VDD range?

 

[leo_o2]

It is common low-voltage BG has poor PSRR. You can put a big capacitor at the output node to improve it.

 

[ccw27]

Any suggestion for high PSSR bandgap topology? Paper?

Thanks

 

[Fom]

I think this circuit has poor PSRR because of M1+M3+M5 gate capacitor that connected between VDD and negative input of OP amp.

 

[zouwanghui]

I think the output of opamp must be connected to the gate of M1 & M3. Because M2 & M4 are used just for current match (i1 & i2).

 

[borodenkov]

from which paper did you take the schematics?

 

[ccw27]

Here is the paper

 

[melodyseu]

connect the output of OPA to the gate of M1,M3.Further to improve the PSR of bandgap you can increase the gain of OPA

 

[andy2000a]

I think M1~M4 need use long channel mos for get good PSRR

 

[leo_o2]

Do you want to improve PSRR for high frequency or low frequency?

 

[ccw27]

less than 10 MHz

 

[ccw27]

Can't connect output of OPA to the gate of M1,M3, you would short input to output of OP.

 

[zouwanghui]

you DO not need connect the gate of M1&M3 to node X, just get rid of it and connected to the output of OP. And what about the gate of M2&M4 ? just refer to Razavi's book to find out how to bias the cascode stage.

 

[cetc1525]

i think your opamp's gain is low.

 

[rambus_ddr]

I think this structure is not good, the error amplifier output connect with the cascode PMOS gate, not thegate of M1 and M2 , then the gain will be very low. so i think that the error amplifier output connect with the gate of M1 and the M1 gate can't connect with the drain of M2.