Important design criteria for comparator used in SAR ADC

[pseudockb]

Let's say the SAR to be designed is of 8-bit, what are the important specifications for the comparator? I would like to know how to calculate how low the offset of the comparator should be, the settling time accuracy, slew rate etc. Please give me some references. Thanks

 

[sunnyboy]

i think it is depend on you circuit structure

 

[xwcwc1234]

To sunnyboy,
What by you mean " depend the circuit structure" ? If I use R-2R DAC , what is the difference between Capacitor type DAC or others ?

 

[fredflinstone]

Hi,
The max offset a comparator can have depends on the resolution of the ADC. If it is a 8bit ADC, then the offset should be less than 1lsb at 8bit level. A good design will be offset <1/2 lsb.
The settling time and slew rate of the comparator also depends on the conversion speed.
hope this helps.
Bakers book has some fundamentals regarding ADC design.

rgds
fred

 

[feier0251]

is it depend on the tech you use and the resolution that the design.

regards