Implementing Embedded Tri-Mode Ethernet MAC Wrapper on Virtex 5

Hi,
I have tried to implement the example design which provided with "Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC Wrapper v1.5" in Core generator,on virtex 5 development board(ML509) with lx110t for the SGMII interface , which is originally designed to ML505 board with lx50t. But I have changed the ucf and was able to get the expected simulation results. When I implement it on ML509 board, the packets were successfully received by the FPGA, but i 'm not able to retransmit the packets we send. I try this on both TEMAC Wrapper version 1.5 and 1.8,and I also try to find the error using the ChipScope, but I was unable to get results as expected.Is any one there who tried this example design with ML509, or any one who knows a solution for this. I really appriciate the help since I stuck here for weekss because of this problem. :|

The first thing to do would be to make sure the SGMII device is configured correctly, and read its registers. There are two PHY devices in the system -- the actual ethernet PHY, and the MAC's SGMII PHY. These two should have different PHY addresses. Then you can read the status of each. You'll probably find that one of the devices has not been enabled or has not connected or is being held in a reset state. Also, it might be useful to connect the MIIM (MDIO/MDC) to the PHY if not done. The registers for the PHY can either be found in a datasheet, or in the linux kernel for less open PHY's.

You might also try to just generated packets. this will show if you have activity at all. A network analyzer or possibly something like wireshark/tcpdump will help here. You should be able to see if you've done something bad with the packets, eg mixed-endian issues, incorrect length, etc...