implementing 74374 latch

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ABHI9868715910

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Hi,

I have been a regular user of this forum.I have got many great ideas from this website when all the roads seems to be closing for me.

I need to implement a code for 74374(8-bit d-type flip flop) chip.

My code is
--latchin - input to latch
--latchout- output of latch
--clk-input for Pin11 (it latches the data from input to output at high-to-low transition of clk )
process(latchin,clk)

begin

if (falling_edge(clk)) then

latchout<=latchin;

end if;
end process;


I hope your there is some solution to my issue.

Abhishek
 

looks like you need to tri-state the output as well

Code:
process (CLK)
begin
  if rising_edge(CLK) then
    q_reg <= D;
  end if;
end process;

-- tri-state output
Q <= q_reg when (OE = '0') else 'Z';

also just noticed this, you only need the clock in the sensitivity list since everything else is synchronous to it.
 

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