implementation of VHDL design.Please Help !!

[srkumar26]

Hello everyone,

I have a VHDL design and i have to program it on an FPGA for my graduate project. We have Celoxica RC200 boards available at our college. can the input data needed for the design be provided from the PC (interfacing to the board). if not can the data be stored in the SRAM banks and read to the FPGA. anyone please help me and tell how to do this.
thanks you
kumar

 

[jacklalo020]

Hello,
I made some research in the web and this is the manual of your board
**broken link removed**
It will describe you the diffrent way to load your design to the FPGA. Just connect the parallel port, powert up and fire the Impact software in ISE it will be very easy
You can also use a JTAG cable to do that if you have this possibility in your board. Be aware that you can either load the file, .bit, to an PROM in order to don't have to program the FPGA every time you shut down the power.
Good luck