AnshuDalvi
Newbie level 3
Hi, I need to implement frequency multiplication using DCM module using propagation delays, that is generate frequencies that are much higher than the system clock.The objective of the project is to propose and implement techniques for generating signals which are below the clock period threshold. At the system level, the project consists in determining propagation delays using programming tools (ISE platform). At the experimental level, the estimated timing characteristics are to be verified for repeatability, stability and consistency. I'm new to this and would appreciate if anyone could help me with this. Would be better if I can get the code(VHDL/Verilog). Thanks in anticipation.