MTicdrec
Newbie level 2
Dear,
I have a thesis that research theory of CAM and implement on FPGA and the application as well. On FPGA we can use BlockRAM available on Altera, or Xilinx (im using Altera), and use SRL, LUT (Look up table). Im newer on FPGA prgramme, so i need some help. Can anyone provide me some block design and the example?
thank so much,
I have a thesis that research theory of CAM and implement on FPGA and the application as well. On FPGA we can use BlockRAM available on Altera, or Xilinx (im using Altera), and use SRL, LUT (Look up table). Im newer on FPGA prgramme, so i need some help. Can anyone provide me some block design and the example?
thank so much,
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