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Impedance requirement for SDRAM signals

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engr_joni_ee

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Hi, I am looking for the impedance requirement in PCB layout of SDRAM MT41K256M16 by Micron. I have looked at the datasheet but I am not sure if I am looking at the right sections or not. On page 62 it says output driver impedance 40 Ohm. I am wondering if it applies to all DQ[0:15], ADR[0:13], BA[0:2], and other signals or maybe not.
 

Micron as number of technical notes regarding SDRAM system design. A typical PCB impedance suggestion is 50 ohm.
 

Hi, I have now looked at this document "TN-46-14: Hardware Tips for Point-to-Point System Design"


On page 3 "Standard characteristic impedance (ZO) of 50–60Ω is recommended for all traces. The 60Ω level also provides a good match to the sum of the output impedance of the controller/FPGA driver and any series resistors used; 60Ω ±6Ω (10 percent tolerance) is Micron’s module and reference design target. Designers are advised to specify ZO, enabling board manufacturers to adjust dielectric thickness and line width to achieve the specification."

Then I guess 50 Ohm impedance on all routing layers should be fine but I don't know what is "output driver impedance" on page 67 of the main datasheet which is 34 Ohm in the following link.

"34 Ohm Output Driver Impedance"
 

Hi,

The output driver appears to have an impedance of 34 to 40 ohms, not sure how calculated here, same as a source or sink, or a battery, have impedance, it has nothing to do with trace impedances, I think. 34 ohms is pretty low-current-capability. Didn't read pdf enough to guess answer to first post question(s).
 

Then I think it should be fine to have characteristic trace impedance 50-60 Ohm for all single ended signals on routing layers in PCB layout. This include DQ[0:15], ADR[0:13], BA[0:2], CS, CKE, RAS, CSA, WE, ODT, LDM, UDM.

How about maintaining 100 Ohm characteristic impedance for differential signals CLK and DQS.
 

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