Impedance controlled traces in Altium without Planes

Hello!

I designing a pcb in an application which need to have HSPA module, GNSS module (and WiFi perhaps).
Due to designing complexity i thinking if i may have fixed impedance traces on 50 Ohms only in necessary areas.
This is for exploitation of 4 layers as signal layers. And without to reserve 2 layer (of 4) as planes.

On 4 layer PCB:
Signal 1
Signal 2
Signal 3
Signal 4

I thinking that this is could be with GND polygon pour below microstrip line.
for example: microstrip line on Signal 1 and GND polygon pour below that, on Signal 2.

Widths of micro-strip lines should be calculated with Calculators depending on dielectric, PCB, and cooper thicknesses.

Is my consideration proper?

Or instead of micro-strip technique, it could be a coplanar microstrip with grounded polygon pour below and adjacent.

Thank you!

I tryied to visualizing my consideration and i draw this.
Polygon pours will be grounded.

The matter is that i don't want to place a whole layer as a dummy Plane layer which prevent me to routing traces in the other regions of pcb (right side in my case)

I thought that too, but i really woried much more for impedance result on the antenna lines on the left side.
I deliberate to provide the pcb stack data to manufacturer with dielectric, and cooper thicknesses as i calculating
myself the necessary widths with some PCB calculator (i use Saturn PCB Design Toolkit).
I discussed that with one manufacturer and he was ok with that.

concerning noise immunity for the other pcb area, which i planned to place SDRAM and arm microcontroller, may i add grounded polygon pour as the impedance-controlled area as the right side.

A micro strip (or coplanar with ground) only sees the plane below it, it doesn't care if it continues on other regions of the board. You may want to sketch an electric field picture to visualize the problem. In so far the answer to your question is simple and obvious.

A different question is if it's reasonable to make a 4 layer board without a ground plane (at least a regional one). I believe only in rare cases.

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Layout looks reasonable. I wonder though, if the circuit on the right side will work better with a continuous ground plane, e.g. regarding noise immunity and radiated EMI.

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i planned to place SDRAM and arm microcontroller

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O.K., it's beyond this thread's topic, but a ground plane is definitely suggested for SDRAM and fast µC interfaces.

Therefore, it is really feasible to replace a "Ground Plane" layer in altium with a user defined grounded polygon pour with respective shape in corresponding area?
All consideration with that is to have exploited one more layer for a few traces beyond the high frequency areas.

PS: thanks for your replies!

Conversely, if i desire to go with tranditional methods, such as 2 Power Planes as internal layers (4 layer altium default) instead of used-defined polygon pours.
Can i route traces upon those internal planes?

Can i route traces upon those internal planes?

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Why not? You mean placing traces on the outer layer above the ground plane? That's the standard option.

Most would go with a std. 4 layer design with power planes and try and get the majority of the routes on the outer layers.... Your 50Ohm can then go on the plane adjacent to the GND layer...

FvM said:

Why not? You mean placing traces on the outer layer above the ground plane? That's the standard option.

Click to expand...

No, I mean to place traces inside that layer (inside the Plane). I suppose i can't.
Therefore, i decide to replace the internal Planes with a big one polygon pour and make mine "Ground Plane".
Like this... **broken link removed** (Page 9 & 10).

I would try to place polygon pours in the 2 internal layers, on the whole internal surface. And i will try to keep it clean without traces.
Traces on those polygons shall appear only for complexity areas in order to keep it clean for impedance control.

dimensions (for impedance calculation) for trace width, dielectric thickness are calculated with Saturn PCB Toolkit .