What you need to do is set the "Time Step Size" under Options--Other Options to a smaller value. Like 100nS or so, maybe less, and not the default 5uS. This will better capture & model the parameters during the firing of the diode.
Yes, it is as you state. I didn't realize what that option does.
I should have experimented with it, because I have been baffled that a simulator as well put together as this one, doesn't seem to handle frequencies above 20 or 25 kHz. Now I find it can when I set a narrower time-step.
(Yet I notice it has transmission line simulations at frequencies in the GHz. The time-step is the key to making this possible. I see it says '1p' in the option field. 1 pico-second.)
This is progress. Thank you. I know I can use Falstad's simulator to greater effect now that I know about this.
You will find that your inductor current undershoot (ringing) disappears - you won't need the 20K anymore, and ALSO the diode peak current is the same as the inductor peak current, which it obviously HAS to be. Your earlier screenshot showed the diode peak as ~200mA, but this was clearly a time-averaged value of the pulse across the 5uS time step. Both these are artifacts of the larger time-step.
The simulation works perfectly once this is done.
I was planning to go back to your post #16, and see if I could track down the root of the discrepancies you found.
Instead I believe you have taken care of it by setting a narrower time-step.
The diode now carries approximately the same current as the coil is discharging.
I should have caught the glaring discrepancy previously. I chalked it up to the 'wild card' nature of a coil as it discharges in these situations. It's a behavior that is difficult to model. So it seemed plausible that 1.7 A would have to be converted to 200mA in order to produce the high V needed to overcome the capacitor charge.
Also solved is the reverse flow back up through the coil, shown happening after the coil discharges (negative spike on the coil, post #9). There should be no way this would happen either in real life or the simulation. This has stopped once I set the time-step narrower.
I would have thought the simulator would flag such inconsistencies.
And now - for my better understanding of this simulator - a couple of questions, if you still have your original setup:
1) what were the settings of the CLK you used ? Freq/Duty Cycle/ voltages/ offset ?
2) what was the BJT beta you used ? Was it the default 100?
Transistor beta 100 (default).
Clock 5 kHz, 73 % duty cycle.
At first I alternated the clock between 12 and 0V. (The setting is for 6V Max Voltage, and 6V DC Offset.)
In my unsuccessful attempts to reduce above-mentioned anomalies, I changed it to 9V and 1V. (4V Max V, and 1V Offset.)