If I want to simulate the SFDR of a 8bit DAC

Should I add a filter behind the DAC, then do the fft analyse for the filter smoothly sinewave output by hspice. Or I can just do the fft analyse for the DAC output directly?

Thanks & Best Regards
Analog_starter

check this

Hi,

Thanks, Btrend. This is a so long reference.
But I only want to know the answer of this question. Who can tell me?

Thanks & Best Regards
Analog_starter

Analog_starter said:

Should I add a filter behind the DAC, then do the fft analyse for the filter smoothly sinewave output by hspice. Or I can just do the fft analyse for the DAC output directly?

Thanks & Best Regards
Analog_starter

Click to expand...

I think there is no need to add such a post filter to ur DAC, but u will need to pass ur DAC's output to a window function (such as hanning window) to make the data changed smooothly (continuously) at the both end , such that ur fft output will not have large spectral leakage.
(refer to **broken link removed**)

Hi Btrend,

Thanks.

Could you tell me for an 8 bit current-steering DAC, which is current output with an external resistor used for I-V converter, how can I configure the testing issue? Is it ok that I just add a resistor on the PCB board and observe the DAC output waveforms or should add any other things such as capacitor for decreasing the DAC output swithing glitchs and filtering some noise? Because I found there are great glitchs in the DAC steplike output simulation when just add the output resistor, this issue can be greatly reduced if I add a 15pf capacitor, but the speed of DAC is limited by it. How can I deal with this? Is the glitch of the DAC output harmful or can I just care the DAC stable output value?

Best Regards
Analog_starter

do u design a LPF after ur current DAC's output ?
there is a spec. about glitch energy in current DAC,
so if u apply a filter to remove it, how can u give the glitch figure to ur customer ?

No, I just want to sum the output current and apply an external resistor used for I-V converter, there is no LPF. But the parasitical capacitance due to package, bonding, and testing device etc. will reduce the glitch of DAC, is it right? So how can I get the real value about the glitch energy in DAC?

Thanks & Best Regards
Analog_starter

I suggest u to read some datasheet of DAC,
or there is a good book in the EDAboard.
check this

and read pp.116 of that book.

Hi,

Thank you, Btrend. I will read it first.

Best Regards
Analog_starter