IF downconverter question.

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Hi, in the above radio design, what's the use of transister MCS and resister RL?
1. Do they construct a fold structure to fold down the IF signal? But if this is the case, the Gilbert mixer load RDEG should be replaced by PMOS to make a current source, am I correct?
2. Do they construct a voltage follower to drive the following Polyphase filter? But I don't think so since they have high output impedance.

Thanks

Some issues you should care about:

- 1/f noise (some of it is already explained in the paper); PMOS less 1/f-noisy than NMOS etc.
- DC level of the stages
- RL can very well be part of the polyphase network

... just some quick thoughts

DonJ said:

Some issues you should care about:

- 1/f noise (some of it is already explained in the paper); PMOS less 1/f-noisy than NMOS etc.
- DC level of the stages
- RL can very well be part of the polyphase network

... just some quick thoughts

Click to expand...

Yes I know PMOS has less 1/f noise than NMOS, and then? In my 1st point, I think the RDEG should be replaced by PMOS to make a current source. Since PMOS is less noisy, why not use it? Other than that, PMOS occupy less chip area than using a big resister.

Why do you think RL can be part of the Polyphase (PPF) network? Before the PPF is loaded, there should be a driver like a voltage follower to provide a small source impedance for the PPF, but it is obviousely that RL and MCS can not do that.

Thanks for your input.

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Like this. They use PMOS M18 and M19 as current sources on the upper side to fold down the signal.

Added after 19 minutes:

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Or like this. But the IF output is still high impedance.

Added after 12 minutes:

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Or like this. A voltage follower as a driver to provide a low impedance output.

The output drivers look like common gate amplifiers if they operate in saturation region. But if this is the case, the input impedance of CG amp. is very small thus attenuate the mixer's gain. So they might operate in triode region and the gate nodes are biased with control signal.

I didn't read the paper yet..... those are just my guess.

Here's some comments (first post):
1.
This is the case, but it's not necessary to use PMOS as current source. Consider that the MCS has low input inpedance from Source, so RDEG can be high value.
2. Infact, reading the paper, it seems that the voltage follower is not shown and is between the proposed schematic and the polyphase.
I don't really understand why they call RDEG a degeneration resistor. In my opinion it has a big value (respect to 1/gm of MCS) to let all current signal go through the MOS.

I hope it can help
Mazz

Mazz said:

Here's some comments (first post):
1.
This is the case, but it's not necessary to use PMOS as current source. Consider that the MCS has low input inpedance from Source, so RDEG can be high value.
2. Infact, reading the paper, it seems that the voltage follower is not shown and is between the proposed schematic and the polyphase.
I don't really understand why they call RDEG a degeneration resistor. In my opinion it has a big value (respect to 1/gm of MCS) to let all current signal go through the MOS.

I hope it can help
Mazz

Click to expand...

Hi Mazz, I agree with you. RDEG should be large to block the IF signal and redirect them to MCS. But my question is why do they use a resister rather than a PMOS. What is the advantage to use a big resister (>>1/Gm)? My second and third graphs show that other people use PMOS instead. Actually I can see some advantage of using PMOS:

1. Smaller chip area;
2. Smaller voltage headroom than the equivalent resister while providing the same current;
3. Less power consumption due to 2.
4. Have the flexibility to control the current.

So there must be a reason behide, or they just simply draw a resister for indication in the paper, or they made a mistake.

Thanks.

One idea could be the flicker noise of the PMOS, to avoid it you can make it large but you'll have parasitics.
we don't know how much this noise impacts on the circuit.
I think your questions are right, but we will not know, if it's only a semplified schematic, a mistake or a good idea. What you can get from paper, and this is general, is the innovation on some part of it.
Other things are details.

I hope it can help.
Mazz

Maybe I get the amswer from the attached paper. Yes, it is about the noise again: "The output of the mixer biases at 0.9 V (0.6 V below the supply) through a polysilicon resistor load. The poly resistor is free of flicker noise, and also produces less thermal noise compared to an active load."