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The one thing I've noticed about your schematic is that you have more than one fundamental frequencies: CLK and CLK_B. I understand that this is just inverted clocks but I am not sure that the simulator can recognize that. Try implementing CLK_B by inverting a CLK through inverter and see if it gives you any meaningful result.

In a meanwhile, I will have look on your analysis setup and tell you if there is something wrong with it.